diff options
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 5efaa23b526..c7a45f65e98 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -39220,9 +39220,12 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG, if (matchScalarReduction(SDValue(N, 0), ISD::AND, SrcOps) && SrcOps.size() == 1) { SDLoc dl(N); + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); unsigned NumElts = SrcOps[0].getValueType().getVectorNumElements(); EVT MaskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts); SDValue Mask = combineBitcastvxi1(DAG, MaskVT, SrcOps[0], dl, Subtarget); + if (!Mask && TLI.isTypeLegal(SrcOps[0].getValueType())) + Mask = DAG.getBitcast(MaskVT, SrcOps[0]); if (Mask) { APInt AllBits = APInt::getAllOnesValue(NumElts); return DAG.getSetCC(dl, MVT::i1, Mask, @@ -39758,9 +39761,12 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG, if (matchScalarReduction(SDValue(N, 0), ISD::OR, SrcOps) && SrcOps.size() == 1) { SDLoc dl(N); + const TargetLowering &TLI = DAG.getTargetLoweringInfo(); unsigned NumElts = SrcOps[0].getValueType().getVectorNumElements(); EVT MaskVT = EVT::getIntegerVT(*DAG.getContext(), NumElts); SDValue Mask = combineBitcastvxi1(DAG, MaskVT, SrcOps[0], dl, Subtarget); + if (!Mask && TLI.isTypeLegal(SrcOps[0].getValueType())) + Mask = DAG.getBitcast(MaskVT, SrcOps[0]); if (Mask) { APInt AllBits = APInt::getNullValue(NumElts); return DAG.getSetCC(dl, MVT::i1, Mask, |