3 files changed, 42 insertions, 20 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 695c58d1a08..b1292bb48b0 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -595,12 +595,17 @@ bool MIParser::parse(MachineInstr *&MI) {
   if (Token.isError() || parseInstruction(OpCode, Flags))
     return true;
 
-  LLT Ty{};
+  SmallVector<LLT, 1> Tys;
   if (isPreISelGenericOpcode(OpCode)) {
-    // For generic opcode, a type is mandatory.
-    auto Loc = Token.location();
-    if (parseLowLevelType(Loc, Ty))
-      return true;
+    // For generic opcode, at least one type is mandatory.
+    expectAndConsume(MIToken::lbrace);
+    do {
+      auto Loc = Token.location();
+      Tys.resize(Tys.size() + 1);
+      if (parseLowLevelType(Loc, Tys[Tys.size() - 1]))
+        return true;
+    } while (consumeIfPresent(MIToken::comma));
+    expectAndConsume(MIToken::rbrace);
   }
 
   // Parse the remaining machine operands.
@@ -658,8 +663,10 @@ bool MIParser::parse(MachineInstr *&MI) {
   // TODO: Check for extraneous machine operands.
   MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
   MI->setFlags(Flags);
-  if (Ty.isValid())
-    MI->setType(Ty);
+  if (Tys.size() > 0) {
+    for (unsigned i = 0; i < Tys.size(); ++i)
+      MI->setType(Tys[i], i);
+  }
   for (const auto &Operand : Operands)
     MI->addOperand(MF, Operand.Operand);
   if (assignRegisterTies(*MI, Operands))
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index bd06eec4d3c..f738385adcc 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -566,8 +566,13 @@ void MIPrinter::print(const MachineInstr &MI) {
   OS << TII->getName(MI.getOpcode());
   if (isPreISelGenericOpcode(MI.getOpcode())) {
     assert(MI.getType().isValid() && "Generic instructions must have a type");
-    OS << ' ';
-    MI.getType().print(OS);
+    OS << " { ";
+    for (unsigned i = 0; i < MI.getNumTypes(); ++i) {
+      MI.getType().print(OS);
+      if (i + 1 != MI.getNumTypes())
+        OS <<  ", ";
+    }
+    OS << " } ";
   }
   if (I < E)
     OS << ' ';
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 2ccfe259e9c..ac5ce811f3a 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -656,7 +656,7 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MCInstrDesc &tid,
       debugLoc(std::move(dl))
 #ifdef LLVM_BUILD_GLOBAL_ISEL
       ,
-      Ty(LLT{})
+      Tys(0)
 #endif
 {
   assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
@@ -680,7 +680,7 @@ MachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI)
       MemRefs(MI.MemRefs), debugLoc(MI.getDebugLoc())
 #ifdef LLVM_BUILD_GLOBAL_ISEL
       ,
-      Ty(LLT{})
+      Tys(0)
 #endif
 {
   assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
@@ -710,18 +710,24 @@ MachineRegisterInfo *MachineInstr::getRegInfo() {
 // The proper implementation is WIP and is tracked here:
 // PR26576.
 #ifndef LLVM_BUILD_GLOBAL_ISEL
-void MachineInstr::setType(LLT Ty) {}
+unsigned MachineInstr::getNumTypes() const { return 0; }
 
-LLT MachineInstr::getType() const { return LLT{}; }
+void MachineInstr::setType(LLT Ty, unsigned Idx) {}
+
+LLT MachineInstr::getType(unsigned Idx) const { return LLT{}; }
 
 #else
-void MachineInstr::setType(LLT Ty) {
+unsigned MachineInstr::getNumTypes() const { return Tys.size(); }
+
+void MachineInstr::setType(LLT Ty, unsigned Idx) {
   assert((!Ty.isValid() || isPreISelGenericOpcode(getOpcode())) &&
          "Non generic instructions are not supposed to be typed");
-  this->Ty = Ty;
+  if (Tys.size() < Idx + 1)
+    Tys.resize(Idx+1);
+  Tys[Idx] = Ty;
 }
 
-LLT MachineInstr::getType() const { return Ty; }
+LLT MachineInstr::getType(unsigned Idx) const { return Tys[Idx]; }
 #endif // LLVM_BUILD_GLOBAL_ISEL
 
 /// RemoveRegOperandsFromUseLists - Unlink all of the register operands in
@@ -1724,10 +1730,14 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
   else
     OS << "UNKNOWN";
 
-  if (getType().isValid()) {
-    OS << ' ';
-    getType().print(OS);
-    OS << ' ';
+  if (getNumTypes() > 0) {
+    OS << " { ";
+    for (unsigned i = 0; i < getNumTypes(); ++i) {
+      getType(i).print(OS);
+      if (i + 1 != getNumTypes())
+        OS << ", ";
+    }
+    OS << " } ";
   }
 
   if (SkipOpers)