diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 7 |
2 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index fe57435204a..3386f80beb8 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -6110,7 +6110,7 @@ MachineInstrBuilder SIInstrInfo::getAddNoCarry(MachineBasicBlock &MBB, Register DestReg, RegScavenger &RS) const { if (ST.hasAddNoCarry()) - return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_U32_e64), DestReg); + return BuildMI(MBB, I, DL, get(AMDGPU::V_ADD_U32_e32), DestReg); Register UnusedCarry = RS.scavengeRegister(RI.getBoolRC(), I, 0, false); // TODO: Users need to deal with this. diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index 235de006a1d..7967d9c9fb9 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -1285,12 +1285,15 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI, .addImm(ST.getWavefrontSizeLog2()) .addReg(DiffReg, RegState::Kill); + const bool IsVOP2 = MIB->getOpcode() == AMDGPU::V_ADD_U32_e32; + // TODO: Fold if use instruction is another add of a constant. - if (AMDGPU::isInlinableLiteral32(Offset, ST.hasInv2PiInlineImm())) { + if (IsVOP2 || AMDGPU::isInlinableLiteral32(Offset, ST.hasInv2PiInlineImm())) { // FIXME: This can fail MIB.addImm(Offset); MIB.addReg(ScaledReg, RegState::Kill); - MIB.addImm(0); // clamp bit + if (!IsVOP2) + MIB.addImm(0); // clamp bit } else { Register ConstOffsetReg = RS->scavengeRegister(&AMDGPU::SReg_32_XM0RegClass, MIB, 0, false); |
