3 files changed, 38 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index 82cec258fa6..f7db60f59b5 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -100,6 +100,23 @@ bool IRTranslator::translateBr(const Instruction &Inst) {
   return true;
 }
 
+bool IRTranslator::translateBitCast(const CastInst &CI) {
+  if (LLT{*CI.getDestTy()} == LLT{*CI.getSrcTy()}) {
+    MIRBuilder.buildInstr(TargetOpcode::COPY, getOrCreateVReg(CI),
+                          getOrCreateVReg(*CI.getOperand(0)));
+    return true;
+  }
+  return translateCast(TargetOpcode::G_BITCAST, CI);
+}
+
+bool IRTranslator::translateCast(unsigned Opcode, const CastInst &CI) {
+  unsigned Op = getOrCreateVReg(*CI.getOperand(0));
+  unsigned Res = getOrCreateVReg(CI);
+  MIRBuilder.buildInstr(Opcode, {LLT{*CI.getDestTy()}, LLT{*CI.getSrcTy()}},
+                        Res, Op);
+  return true;
+}
+
 bool IRTranslator::translateStaticAlloca(const AllocaInst &AI) {
   assert(AI.isStaticAlloca() && "only handle static allocas now");
   MachineFunction &MF = MIRBuilder.getMF();
@@ -138,6 +155,14 @@ bool IRTranslator::translate(const Instruction &Inst) {
   case Instruction::Ret:
     return translateReturn(Inst);
 
+  // Casts
+  case Instruction::BitCast:
+    return translateBitCast(cast<CastInst>(Inst));
+  case Instruction::IntToPtr:
+    return translateCast(TargetOpcode::G_INTTOPTR, cast<CastInst>(Inst));
+  case Instruction::PtrToInt:
+    return translateCast(TargetOpcode::G_PTRTOINT, cast<CastInst>(Inst));
+
   case Instruction::Alloca:
     return translateStaticAlloca(cast<AllocaInst>(Inst));
 
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index 2b91584c75d..f18467c4bb4 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -85,6 +85,18 @@ MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, LLT Ty,
   return NewMI;
 }
 
+MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, ArrayRef<LLT> Tys,
+                                           unsigned Res, unsigned Op0) {
+  MachineInstr *NewMI = buildInstr(Opcode, Tys[0]);
+  for (unsigned i = 1; i < Tys.size(); ++i)
+    NewMI->setType(Tys[i], i);
+
+  MachineInstrBuilder(getMF(), NewMI)
+      .addReg(Res, RegState::Define)
+      .addReg(Op0);
+  return NewMI;
+}
+
 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res,
                                            unsigned Op0) {
   MachineInstr *NewMI = buildInstr(Opcode, LLT{});
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index f738385adcc..7946fc2676f 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -568,7 +568,7 @@ void MIPrinter::print(const MachineInstr &MI) {
     assert(MI.getType().isValid() && "Generic instructions must have a type");
     OS << " { ";
     for (unsigned i = 0; i < MI.getNumTypes(); ++i) {
-      MI.getType().print(OS);
+      MI.getType(i).print(OS);
       if (i + 1 != MI.getNumTypes())
         OS <<  ", ";
     }