summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0193f2bfd58..2cb6ec376c4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -35656,6 +35656,11 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG,
unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
MVT SubVecVT = SubVec.getSimpleValueType();
+ // Inserting zeros into zeros is a nop.
+ if (ISD::isBuildVectorAllZeros(Vec.getNode()) &&
+ ISD::isBuildVectorAllZeros(SubVec.getNode()))
+ return Vec;
+
// If this is an insert of an extract, combine to a shuffle. Don't do this
// if the insert or extract can be represented with a subregister operation.
if (SubVec.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
OpenPOWER on IntegriCloud