diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 26 |
2 files changed, 1 insertions, 31 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index b201126c593..0cfdaf66544 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -945,11 +945,7 @@ void AMDGPUTargetLowering::analyzeFormalArgumentsCompute( unsigned NumRegs = getNumRegistersForCallingConv(Ctx, ArgVT); - if (!Subtarget->isAmdHsaOS() && - (ArgVT == MVT::i16 || ArgVT == MVT::i8 || ArgVT == MVT::f16)) { - // The ABI says the caller will extend these values to 32-bits. - MemVT = ArgVT.isInteger() ? MVT::i32 : MVT::f32; - } else if (NumRegs == 1) { + if (NumRegs == 1) { // This argument is not split, so the IR type is the memory type. if (ArgVT.isExtended()) { // We have an extended type, like i24, so we should just use the diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp index 8cc7e38f7b2..c147830e12e 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp @@ -100,16 +100,6 @@ bool AMDGPULowerKernelArguments::runOnFunction(Function &F) { unsigned Size = DL.getTypeSizeInBits(ArgTy); unsigned AllocSize = DL.getTypeAllocSize(ArgTy); - - // Clover seems to always pad i8/i16 to i32, but doesn't properly align - // them? - // Make sure the struct elements have correct size and alignment for ext - // args. These seem to be padded up to 4-bytes but not correctly aligned. - bool IsExtArg = AllocSize < 32 && (Arg.hasZExtAttr() || Arg.hasSExtAttr()) && - !ST.isAmdHsaOS(); - if (IsExtArg) - AllocSize = 4; - uint64_t EltOffset = alignTo(ExplicitArgOffset, Align) + BaseOffset; ExplicitArgOffset = alignTo(ExplicitArgOffset, Align) + AllocSize; @@ -164,8 +154,6 @@ bool AMDGPULowerKernelArguments::runOnFunction(Function &F) { ArgPtr->getName() + ".cast"); } - assert((!IsExtArg || !IsV3) && "incompatible situation"); - if (IsV3 && Size >= 32) { V4Ty = VectorType::get(VT->getVectorElementType(), 4); // Use the hack that clang uses to avoid SelectionDAG ruining v3 loads @@ -212,20 +200,6 @@ bool AMDGPULowerKernelArguments::runOnFunction(Function &F) { // TODO: Convert noalias arg to !noalias if (Size < 32 && !ArgTy->isAggregateType()) { - if (IsExtArg && OffsetDiff == 0) { - Type *I32Ty = Builder.getInt32Ty(); - bool IsSext = Arg.hasSExtAttr(); - Metadata *LowAndHigh[] = { - ConstantAsMetadata::get( - ConstantInt::get(I32Ty, IsSext ? minIntN(Size) : 0)), - ConstantAsMetadata::get( - ConstantInt::get(I32Ty, - IsSext ? maxIntN(Size) + 1 : maxUIntN(Size) + 1)) - }; - - Load->setMetadata(LLVMContext::MD_range, MDNode::get(Ctx, LowAndHigh)); - } - Value *ExtractBits = OffsetDiff == 0 ? Load : Builder.CreateLShr(Load, OffsetDiff * 8); |
