diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrMMX.td | 10 | ||||
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedBroadwell.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedHaswell.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSkylakeClient.td | 3 | ||||
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedSkylakeServer.td | 3 |
5 files changed, 5 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index 0b4ad80d08c..57a5bee2b26 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -204,7 +204,7 @@ def MMX_MOVD64to64rr : MMXRI<0x6E, MRMSrcReg, (outs VR64:$dst), (ins GR64:$src), let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayLoad = 1 in def MMX_MOVD64to64rm : MMXRI<0x6E, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}", - []>, Sched<[WriteLoad]>; + []>, Sched<[SchedWriteVecMoveLS.MMX.RM]>; // These are 64 bit moves, but since the OS X assembler doesn't // recognize a register-register movq, we write them as @@ -228,16 +228,16 @@ let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayStore = 1 in def MMX_MOVD64from64rm : MMXRI<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), "movq\t{$src, $dst|$dst, $src}", []>, - Sched<[WriteStore]>; + Sched<[SchedWriteVecMoveLS.MMX.MR]>; -let SchedRW = [WriteLoad] in { +let SchedRW = [SchedWriteVecMoveLS.MMX.RM] in { let canFoldAsLoad = 1 in def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (outs VR64:$dst), (ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (load_mmx addr:$src))]>; } // SchedRW -let SchedRW = [WriteStore] in +let SchedRW = [SchedWriteVecMoveLS.MMX.MR] in def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), "movq\t{$src, $dst|$dst, $src}", [(store (x86mmx VR64:$src), addr:$dst)]>; @@ -272,7 +272,7 @@ let Predicates = [HasSSE1] in def MMX_MOVNTQmr : MMXI<0xE7, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), "movntq\t{$src, $dst|$dst, $src}", [(int_x86_mmx_movnt_dq addr:$dst, VR64:$src)]>, - Sched<[WriteStore]>; + Sched<[SchedWriteVecMoveLS.MMX.MR]>; let Predicates = [HasMMX] in { let AddedComplexity = 15 in diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td index cae21d60482..268f60b8237 100755 --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -575,10 +575,7 @@ def BWWriteResGroup10 : SchedWriteRes<[BWPort4,BWPort237]> { let ResourceCycles = [1,1]; } def: InstRW<[BWWriteResGroup10], (instregex "FBSTPm", - "MMX_MOVD64from64rm", "MMX_MOVD64mr", - "MMX_MOVNTQmr", - "MMX_MOVQ64mr", "MOVNTI_64mr", "MOVNTImr", "ST_FP(32|64|80)m", diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index e6c35444cac..7b84757baa3 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -752,10 +752,7 @@ def HWWriteResGroup1 : SchedWriteRes<[HWPort4,HWPort237]> { let ResourceCycles = [1,1]; } def: InstRW<[HWWriteResGroup1], (instregex "FBSTPm", - "MMX_MOVD64from64rm", "MMX_MOVD64mr", - "MMX_MOVNTQmr", - "MMX_MOVQ64mr", "MOVNTI_64mr", "MOVNTImr", "ST_FP(32|64|80)m", diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td index 20e1a71e5e7..e8da8b807aa 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -578,10 +578,7 @@ def SKLWriteResGroup11 : SchedWriteRes<[SKLPort4,SKLPort237]> { let ResourceCycles = [1,1]; } def: InstRW<[SKLWriteResGroup11], (instregex "FBSTPm", - "MMX_MOVD64from64rm", "MMX_MOVD64mr", - "MMX_MOVNTQmr", - "MMX_MOVQ64mr", "MOVNTI_64mr", "MOVNTImr", "ST_FP(32|64|80)m", diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index 592dcf2d303..ce3c5104900 100755 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -603,10 +603,7 @@ def SKXWriteResGroup11 : SchedWriteRes<[SKXPort4,SKXPort237]> { } def: InstRW<[SKXWriteResGroup11], (instregex "FBSTPm", "KMOV(B|D|Q|W)mk", - "MMX_MOVD64from64rm", "MMX_MOVD64mr", - "MMX_MOVNTQmr", - "MMX_MOVQ64mr", "MOVNTI_64mr", "MOVNTImr", "ST_FP(32|64|80)m", |
