diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 757fe86935c..92542198677 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -32410,7 +32410,6 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode( } break; } - case X86ISD::VSRAI: case X86ISD::VSRLI: { if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { if (ShiftImm->getAPIntValue().uge(BitWidth)) @@ -32420,10 +32419,24 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode( unsigned ShAmt = ShiftImm->getZExtValue(); APInt DemandedMask = OriginalDemandedBits << ShAmt; + if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask, + OriginalDemandedElts, KnownOp, TLO, Depth + 1)) + return true; + } + break; + } + case X86ISD::VSRAI: { + if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { + if (ShiftImm->getAPIntValue().uge(BitWidth)) + break; + + KnownBits KnownOp; + unsigned ShAmt = ShiftImm->getZExtValue(); + APInt DemandedMask = OriginalDemandedBits << ShAmt; + // If any of the demanded bits are produced by the sign extension, we also // demand the input sign bit. - if (Opc == X86ISD::VSRAI && - OriginalDemandedBits.countLeadingZeros() < ShAmt) + if (OriginalDemandedBits.countLeadingZeros() < ShAmt) DemandedMask.setSignBit(); if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask, |
