diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/IR/AutoUpgrade.cpp | 43 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 25 |
2 files changed, 49 insertions, 19 deletions
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp index 4a79275feea..65d9bd54e4f 100644 --- a/llvm/lib/IR/AutoUpgrade.cpp +++ b/llvm/lib/IR/AutoUpgrade.cpp @@ -406,6 +406,24 @@ static bool UpgradeX86IntrinsicFunction(Function *F, StringRef Name, if (Name == "avx512.mask.cmp.ps.512") // Added in 7.0 return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_cmp_ps_512, NewFn); + if (Name == "avx512.mask.fpclass.pd.128") // Added in 7.0 + return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_fpclass_pd_128, + NewFn); + if (Name == "avx512.mask.fpclass.pd.256") // Added in 7.0 + return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_fpclass_pd_256, + NewFn); + if (Name == "avx512.mask.fpclass.pd.512") // Added in 7.0 + return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_fpclass_pd_512, + NewFn); + if (Name == "avx512.mask.fpclass.ps.128") // Added in 7.0 + return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_fpclass_ps_128, + NewFn); + if (Name == "avx512.mask.fpclass.ps.256") // Added in 7.0 + return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_fpclass_ps_256, + NewFn); + if (Name == "avx512.mask.fpclass.ps.512") // Added in 7.0 + return UpgradeX86MaskedFPCompare(F, Intrinsic::x86_avx512_mask_fpclass_ps_512, + NewFn); // frcz.ss/sd may need to have an argument dropped. Added in 3.2 if (Name.startswith("xop.vfrcz.ss") && F->arg_size() == 2) { @@ -3125,6 +3143,31 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) { return; } + case Intrinsic::x86_avx512_mask_fpclass_pd_128: + case Intrinsic::x86_avx512_mask_fpclass_pd_256: + case Intrinsic::x86_avx512_mask_fpclass_pd_512: + case Intrinsic::x86_avx512_mask_fpclass_ps_128: + case Intrinsic::x86_avx512_mask_fpclass_ps_256: + case Intrinsic::x86_avx512_mask_fpclass_ps_512: { + SmallVector<Value *, 4> Args; + Args.push_back(CI->getArgOperand(0)); + Args.push_back(CI->getArgOperand(1)); + + NewCall = Builder.CreateCall(NewFn, Args); + unsigned NumElts = Args[0]->getType()->getVectorNumElements(); + Value *Res = ApplyX86MaskOn1BitsVec(Builder, NewCall, CI->getArgOperand(2), + NumElts); + + std::string Name = CI->getName(); + if (!Name.empty()) { + CI->setName(Name + ".old"); + NewCall->setName(Name); + } + CI->replaceAllUsesWith(Res); + CI->eraseFromParent(); + return; + } + case Intrinsic::thread_pointer: { NewCall = Builder.CreateCall(NewFn, {}); break; diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e0637094a06..660e555bc71 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -20748,23 +20748,11 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, Mask, PassThru, Subtarget, DAG); } case FPCLASS: { - // FPclass intrinsics with mask - SDValue Src1 = Op.getOperand(1); - MVT VT = Src1.getSimpleValueType(); - MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements()); - SDValue Imm = Op.getOperand(2); - SDValue Mask = Op.getOperand(3); - MVT BitcastVT = MVT::getVectorVT(MVT::i1, - Mask.getSimpleValueType().getSizeInBits()); - SDValue FPclass = DAG.getNode(IntrData->Opc0, dl, MaskVT, Src1, Imm); - SDValue FPclassMask = getVectorMaskingNode(FPclass, Mask, SDValue(), - Subtarget, DAG); - // Need to fill with zeros to ensure the bitcast will produce zeroes - // for the upper bits in the v2i1/v4i1 case. - SDValue Res = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, BitcastVT, - DAG.getConstant(0, dl, BitcastVT), - FPclassMask, DAG.getIntPtrConstant(0, dl)); - return DAG.getBitcast(Op.getValueType(), Res); + // FPclass intrinsics + SDValue Src1 = Op.getOperand(1); + MVT MaskVT = Op.getSimpleValueType(); + SDValue Imm = Op.getOperand(2); + return DAG.getNode(IntrData->Opc0, dl, MaskVT, Src1, Imm); } case FPCLASSS: { SDValue Src1 = Op.getOperand(1); @@ -20808,8 +20796,7 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, } case CMP_MASK_CC: { - MVT VT = Op.getOperand(1).getSimpleValueType(); - MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements()); + MVT MaskVT = Op.getSimpleValueType(); SDValue Cmp; SDValue CC = Op.getOperand(3); CC = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, CC); |
