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-rw-r--r--llvm/lib/Target/R600/AMDGPUISelLowering.cpp13
1 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
index 8440c39c18d..89dab098710 100644
--- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -2048,16 +2048,23 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,
return DAG.getZeroExtendInReg(BitsFrom, DL, SmallVT);
}
- if (ConstantSDNode *Val = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
+ if (ConstantSDNode *CVal = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
if (Signed) {
+ // Avoid undefined left shift of a negative in the constant fold.
+ // TODO: I'm not sure what the behavior of the hardware is, this should
+ // probably follow that instead.
+ int32_t Val = CVal->getSExtValue();
+ if (Val < 0)
+ return SDValue();
+
return constantFoldBFE<int32_t>(DAG,
- Val->getSExtValue(),
+ Val,
OffsetVal,
WidthVal);
}
return constantFoldBFE<uint32_t>(DAG,
- Val->getZExtValue(),
+ CVal->getZExtValue(),
OffsetVal,
WidthVal);
}
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