diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600RegisterInfo.td | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 1 |
3 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td b/llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td index ba0490abee8..3bbcba826f6 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td @@ -17,8 +17,6 @@ foreach Index = 0-15 in { def sub#Index : SubRegIndex<32, !shl(Index, 5)>; } -def INDIRECT_BASE_ADDR : Register <"INDIRECT_BASE_ADDR">; - } include "R600RegisterInfo.td" diff --git a/llvm/lib/Target/AMDGPU/R600RegisterInfo.td b/llvm/lib/Target/AMDGPU/R600RegisterInfo.td index 3c1e8527284..84ab328bdb2 100644 --- a/llvm/lib/Target/AMDGPU/R600RegisterInfo.td +++ b/llvm/lib/Target/AMDGPU/R600RegisterInfo.td @@ -147,6 +147,7 @@ def PRED_SEL_OFF: R600Reg<"Pred_sel_off", 0>; def PRED_SEL_ZERO : R600Reg<"Pred_sel_zero", 2>; def PRED_SEL_ONE : R600Reg<"Pred_sel_one", 3>; def AR_X : R600Reg<"AR.x", 0>; +def INDIRECT_BASE_ADDR : R600Reg <"INDIRECT_BASE_ADDR", 0>; def R600_ArrayBase : RegisterClass <"AMDGPU", [f32, i32], 32, (add (sequence "ArrayBase%u", 448, 480))>; diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index bb5e252e1ba..8559c274dfe 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -148,7 +148,6 @@ unsigned SIRegisterInfo::reservedStackPtrOffsetReg( BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); - Reserved.set(AMDGPU::INDIRECT_BASE_ADDR); // EXEC_LO and EXEC_HI could be allocated and used as regular register, but // this seems likely to result in bugs, so I'm marking them as reserved. |
