diff options
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ScheduleBtVer2.td | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td index 1b4d1ad73fa..9e3f5449aba 100644 --- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td +++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td @@ -372,7 +372,7 @@ def : WriteRes<WriteMMXMOVMSK, [JFPU0, JFPA, JALU0]> { let Latency = 3; } defm : JWriteResFpuPair<WriteAESIMC, [JFPU0, JVIMUL], 2>; defm : JWriteResFpuPair<WriteAESKeyGen, [JFPU0, JVIMUL], 2>; -defm : JWriteResFpuPair<WriteAESDecEnc, [JFPU0, JVIMUL], 3>; +defm : JWriteResFpuPair<WriteAESDecEnc, [JFPU0, JVIMUL], 3, [1], 2>; //////////////////////////////////////////////////////////////////////////////// // Horizontal add/sub instructions. @@ -748,18 +748,21 @@ def : InstRW<[JWriteShuffleYLd, ReadAfterLd], (instrs VBLENDPDYrmi, VBLENDPSYrmi def JWriteVBROADCASTYLd: SchedWriteRes<[JLAGU, JFPU01, JFPX]> { let Latency = 6; let ResourceCycles = [1, 2, 4]; + let NumMicroOps = 2; } def : InstRW<[JWriteVBROADCASTYLd, ReadAfterLd], (instrs VBROADCASTSDYrm, VBROADCASTSSYrm)>; def JWriteFPAY22: SchedWriteRes<[JFPU0, JFPA]> { let Latency = 2; let ResourceCycles = [2, 2]; + let NumMicroOps = 2; } def : InstRW<[JWriteFPAY22], (instregex "VCMPP(S|D)Yrri", "VM(AX|IN)P(D|S)Yrr")>; def JWriteFPAY22Ld: SchedWriteRes<[JLAGU, JFPU0, JFPA]> { let Latency = 7; let ResourceCycles = [2, 2, 2]; + let NumMicroOps = 2; } def : InstRW<[JWriteFPAY22Ld, ReadAfterLd], (instregex "VCMPP(S|D)Yrmi", "VM(AX|IN)P(D|S)Yrm")>; |