diff options
Diffstat (limited to 'llvm/lib')
30 files changed, 70 insertions, 42 deletions
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp index 1c362aec6e6..50c178ff759 100644 --- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp +++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp @@ -48,8 +48,8 @@ void LLVMTargetMachine::initAsmInfo() { STI.reset(TheTarget.createMCSubtargetInfo( getTargetTriple().str(), getTargetCPU(), getTargetFeatureString())); - MCAsmInfo *TmpAsmInfo = - TheTarget.createMCAsmInfo(*MRI, getTargetTriple().str()); + MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo( + *MRI, getTargetTriple().str(), Options.MCOptions); // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0, // and if the old one gets included then MCAsmInfo will be NULL and // we'll crash later. diff --git a/llvm/lib/MC/MCDisassembler/Disassembler.cpp b/llvm/lib/MC/MCDisassembler/Disassembler.cpp index 21bdc2eaea3..4123d12e1cc 100644 --- a/llvm/lib/MC/MCDisassembler/Disassembler.cpp +++ b/llvm/lib/MC/MCDisassembler/Disassembler.cpp @@ -24,6 +24,7 @@ #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSchedule.h" #include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/MCTargetOptions.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/FormattedStream.h" #include "llvm/Support/TargetRegistry.h" @@ -56,8 +57,10 @@ LLVMCreateDisasmCPUFeatures(const char *TT, const char *CPU, if (!MRI) return nullptr; + MCTargetOptions MCOptions; // Get the assembler info needed to setup the MCContext. - std::unique_ptr<const MCAsmInfo> MAI(TheTarget->createMCAsmInfo(*MRI, TT)); + std::unique_ptr<const MCAsmInfo> MAI( + TheTarget->createMCAsmInfo(*MRI, TT, MCOptions)); if (!MAI) return nullptr; diff --git a/llvm/lib/Object/ModuleSymbolTable.cpp b/llvm/lib/Object/ModuleSymbolTable.cpp index d1e0ce5edae..17ac4afda2d 100644 --- a/llvm/lib/Object/ModuleSymbolTable.cpp +++ b/llvm/lib/Object/ModuleSymbolTable.cpp @@ -83,7 +83,8 @@ initializeRecordStreamer(const Module &M, if (!MRI) return; - std::unique_ptr<MCAsmInfo> MAI(T->createMCAsmInfo(*MRI, TT.str())); + MCTargetOptions MCOptions; + std::unique_ptr<MCAsmInfo> MAI(T->createMCAsmInfo(*MRI, TT.str(), MCOptions)); if (!MAI) return; @@ -109,7 +110,6 @@ initializeRecordStreamer(const Module &M, std::unique_ptr<MCAsmParser> Parser( createMCAsmParser(SrcMgr, MCCtx, Streamer, *MAI)); - MCTargetOptions MCOptions; std::unique_ptr<MCTargetAsmParser> TAP( T->createMCAsmParser(*STI, *Parser, *MCII, MCOptions)); if (!TAP) diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp index 1d583ec0087..0cafd5dd12f 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp @@ -238,7 +238,8 @@ static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) { } static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { MCAsmInfo *MAI; if (TheTriple.isOSBinFormatMachO()) MAI = new AArch64MCAsmInfoDarwin(TheTriple.getArch() == Triple::aarch64_32); diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp index 9e04ab9bae9..9644e66fda4 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp @@ -14,7 +14,9 @@ using namespace llvm; -AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT) : MCAsmInfoELF() { +AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT, + const MCTargetOptions &Options) + : MCAsmInfoELF() { CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4; StackGrowsUp = true; HasSingleParameterDotFile = false; diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h index 71e63ec27a8..65c9b1917bf 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.h @@ -25,7 +25,7 @@ class Triple; // with 'L' as a local symbol. class AMDGPUMCAsmInfo : public MCAsmInfoELF { public: - explicit AMDGPUMCAsmInfo(const Triple &TT); + explicit AMDGPUMCAsmInfo(const Triple &TT, const MCTargetOptions &Options); bool shouldOmitSectionDirective(StringRef SectionName) const override; unsigned getMaxInstLength(const MCSubtargetInfo *STI) const override; }; diff --git a/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp b/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp index aa4818cd57a..84753453027 100644 --- a/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp +++ b/llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp @@ -52,7 +52,8 @@ static MCSubtargetInfo *createARCMCSubtargetInfo(const Triple &TT, } static MCAsmInfo *createARCMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new ARCMCAsmInfo(TT); // Initial state of the frame pointer is SP. diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index 90022a8d88a..b546335efb9 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -187,7 +187,8 @@ static MCRegisterInfo *createARMMCRegisterInfo(const Triple &Triple) { } static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { MCAsmInfo *MAI; if (TheTriple.isOSDarwin() || TheTriple.isOSBinFormatMachO()) MAI = new ARMMCAsmInfoDarwin(TheTriple); diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp index 99b2172c562..c25a2b23201 100644 --- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp +++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp @@ -16,7 +16,7 @@ namespace llvm { -AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT) { +AVRMCAsmInfo::AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) { CodePointerSize = 2; CalleeSaveStackSlotSize = 2; CommentString = ";"; diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h index b2fa18777bc..17dd77f6266 100644 --- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h +++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.h @@ -22,7 +22,7 @@ class Triple; /// Specifies the format of AVR assembly files. class AVRMCAsmInfo : public MCAsmInfo { public: - explicit AVRMCAsmInfo(const Triple &TT); + explicit AVRMCAsmInfo(const Triple &TT, const MCTargetOptions &Options); }; } // end namespace llvm diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h index 04a6a87cebc..97f0cbd5860 100644 --- a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h +++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h @@ -21,7 +21,7 @@ class Target; class BPFMCAsmInfo : public MCAsmInfo { public: - explicit BPFMCAsmInfo(const Triple &TT) { + explicit BPFMCAsmInfo(const Triple &TT, const MCTargetOptions &Options) { if (TT.getArch() == Triple::bpfeb) IsLittleEndian = false; diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp index 870ab9e94a6..85198ec65f9 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp @@ -219,7 +219,8 @@ static MCRegisterInfo *createHexagonMCRegisterInfo(const Triple &TT) { } static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new HexagonMCAsmInfo(TT); // VirtualFP = (R30 + #0). diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp index 14d3dac26d1..f1c17489704 100644 --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp @@ -18,7 +18,8 @@ using namespace llvm; void LanaiMCAsmInfo::anchor() {} -LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/) { +LanaiMCAsmInfo::LanaiMCAsmInfo(const Triple & /*TheTriple*/, + const MCTargetOptions &Options) { IsLittleEndian = false; PrivateGlobalPrefix = ".L"; WeakRefDirective = "\t.weak\t"; diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h index 265af425d03..f0352d02129 100644 --- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h +++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.h @@ -22,7 +22,8 @@ class LanaiMCAsmInfo : public MCAsmInfoELF { void anchor() override; public: - explicit LanaiMCAsmInfo(const Triple &TheTriple); + explicit LanaiMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp index db5a49dd22a..cfdc44ada77 100644 --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp @@ -15,7 +15,8 @@ using namespace llvm; void MSP430MCAsmInfo::anchor() { } -MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT) { +MSP430MCAsmInfo::MSP430MCAsmInfo(const Triple &TT, + const MCTargetOptions &Options) { CodePointerSize = CalleeSaveStackSlotSize = 2; CommentString = ";"; diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h index 93979df037e..c4ff4a9eefb 100644 --- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h +++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.h @@ -22,7 +22,7 @@ class MSP430MCAsmInfo : public MCAsmInfoELF { void anchor() override; public: - explicit MSP430MCAsmInfo(const Triple &TT); + explicit MSP430MCAsmInfo(const Triple &TT, const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp index ec78158d387..5182205edae 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -11,25 +11,27 @@ //===----------------------------------------------------------------------===// #include "MipsMCAsmInfo.h" +#include "MipsABIInfo.h" #include "llvm/ADT/Triple.h" using namespace llvm; void MipsMCAsmInfo::anchor() { } -MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { +MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options) { IsLittleEndian = TheTriple.isLittleEndian(); - if (TheTriple.isMIPS64() && TheTriple.getEnvironment() != Triple::GNUABIN32) + MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TheTriple, "", Options); + + if (TheTriple.isMIPS64() && !ABI.IsN32()) CodePointerSize = CalleeSaveStackSlotSize = 8; - // FIXME: This condition isn't quite right but it's the best we can do until - // this object can identify the ABI. It will misbehave when using O32 - // on a mips64*-* triple. - if (TheTriple.isMIPS32()) { + if (ABI.IsO32()) PrivateGlobalPrefix = "$"; - PrivateLabelPrefix = "$"; - } + else if (ABI.IsN32() || ABI.IsN64()) + PrivateGlobalPrefix = ".L"; + PrivateLabelPrefix = PrivateGlobalPrefix; AlignmentIsInBytes = false; Data16bitsDirective = "\t.2byte\t"; diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h index 867f4d223de..d8bfe58d24a 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h @@ -22,7 +22,8 @@ class MipsMCAsmInfo : public MCAsmInfoELF { void anchor() override; public: - explicit MipsMCAsmInfo(const Triple &TheTriple); + explicit MipsMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); }; } // namespace llvm diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 79c47d1b650..2aee3e8956b 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -81,8 +81,9 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT, } static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { - MCAsmInfo *MAI = new MipsMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions &Options) { + MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP); diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp index 556745825a1..7e1da9b7a94 100644 --- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp +++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.cpp @@ -17,7 +17,8 @@ using namespace llvm; void NVPTXMCAsmInfo::anchor() {} -NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple) { +NVPTXMCAsmInfo::NVPTXMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options) { if (TheTriple.getArch() == Triple::nvptx64) { CodePointerSize = CalleeSaveStackSlotSize = 8; } diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h index e888526da89..ce5ca99c539 100644 --- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h +++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCAsmInfo.h @@ -23,7 +23,8 @@ class NVPTXMCAsmInfo : public MCAsmInfo { virtual void anchor(); public: - explicit NVPTXMCAsmInfo(const Triple &TheTriple); + explicit NVPTXMCAsmInfo(const Triple &TheTriple, + const MCTargetOptions &Options); /// Return true if the .section directive should be omitted when /// emitting \p SectionName. For example: diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp index 90c3c8d20ed..a9717bfc308 100644 --- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp +++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp @@ -76,7 +76,8 @@ static MCSubtargetInfo *createPPCMCSubtargetInfo(const Triple &TT, } static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || TheTriple.getArch() == Triple::ppc64le); diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp index 5a4c86e48f1..2e44b5ebb5b 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp @@ -51,7 +51,8 @@ static MCRegisterInfo *createRISCVMCRegisterInfo(const Triple &TT) { } static MCAsmInfo *createRISCVMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new RISCVMCAsmInfo(TT); Register SP = MRI.getDwarfRegNum(RISCV::X2, true); diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp index ce593bb6677..e4b1f0bc9bc 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp @@ -33,7 +33,8 @@ using namespace llvm; #include "SparcGenRegisterInfo.inc" static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0); @@ -42,7 +43,8 @@ static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, } static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); unsigned Reg = MRI.getDwarfRegNum(SP::O6, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047); diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp index 3c0300cfd8f..e40d0f11068 100644 --- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp +++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp @@ -147,7 +147,8 @@ unsigned SystemZMC::getFirstReg(unsigned Reg) { } static MCAsmInfo *createSystemZMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new SystemZMCAsmInfo(TT); MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp index 8f6531563e1..c3d259e6ff2 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp @@ -21,7 +21,8 @@ using namespace llvm; WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() = default; // anchor. -WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T) { +WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions &Options) { CodePointerSize = CalleeSaveStackSlotSize = T.isArch64Bit() ? 8 : 4; // TODO: What should MaxInstLength be? diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h index 9efbbf881f5..5ba4dcf8c4b 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h @@ -22,7 +22,8 @@ class Triple; class WebAssemblyMCAsmInfo final : public MCAsmInfoWasm { public: - explicit WebAssemblyMCAsmInfo(const Triple &T); + explicit WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions &Options); ~WebAssemblyMCAsmInfo() override; }; diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp index 9c8ca1f13b1..0eccbbf78f8 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp @@ -35,8 +35,9 @@ using namespace llvm; #include "WebAssemblyGenRegisterInfo.inc" static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo & /*MRI*/, - const Triple &TT) { - return new WebAssemblyMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions &Options) { + return new WebAssemblyMCAsmInfo(TT, Options); } static MCInstrInfo *createMCInstrInfo() { diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp index ced9eacc8b9..56a7615850c 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp @@ -323,7 +323,8 @@ static MCRegisterInfo *createX86MCRegisterInfo(const Triple &TT) { } static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TheTriple) { + const Triple &TheTriple, + const MCTargetOptions &Options) { bool is64Bit = TheTriple.getArch() == Triple::x86_64; MCAsmInfo *MAI; diff --git a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp index 877f38e22f9..02519864854 100644 --- a/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp +++ b/llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp @@ -55,7 +55,8 @@ createXCoreMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { } static MCAsmInfo *createXCoreMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { + const Triple &TT, + const MCTargetOptions &Options) { MCAsmInfo *MAI = new XCoreMCAsmInfo(TT); // Initial state of the frame pointer is SP. |
