diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.cpp | 75 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h | 24 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt | 1 |
4 files changed, 103 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp index da57b90dd8c..626132d36d1 100644 --- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp +++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp @@ -17,6 +17,7 @@ #include "AMDGPU.h" #include "AMDGPUSubtarget.h" #include "SIInstrInfo.h" +#include "Utils/AMDGPULaneDominator.h" #include "llvm/CodeGen/LiveIntervals.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" @@ -141,7 +142,8 @@ bool SILowerI1Copies::runOnMachineFunction(MachineFunction &MF) { DefInst->getOperand(3).getReg()) && TRI->getCommonSubClass( MRI.getRegClass(DefInst->getOperand(3).getReg()), - &AMDGPU::SGPR_64RegClass)) { + &AMDGPU::SGPR_64RegClass) && + AMDGPU::laneDominates(DefInst->getParent(), &MBB)) { BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_B64)) .add(Dst) .addReg(AMDGPU::EXEC) diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.cpp new file mode 100644 index 00000000000..1924f71f11c --- /dev/null +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.cpp @@ -0,0 +1,75 @@ +//===-- AMDGPULaneDominator.cpp - Determine Lane Dominators ---------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// MBB A lane-dominates MBB B if +// 1. A dominates B in the usual sense, i.e. every path from the entry to B +// goes through A, and +// 2. whenever B executes, every active lane during that execution of B was +// also active during the most recent execution of A. +// +// The simplest example where A dominates B but does not lane-dominate it is +// where A is a loop: +// +// | +// +--+ +// A | +// +--+ +// | +// B +// +// Unfortunately, the second condition is not fully captured by the control +// flow graph when it is unstructured (as may happen when branch conditions are +// uniform). +// +// The following replacement of the second condition is a conservative +// approximation. It is an equivalent condition when the CFG is fully +// structured: +// +// 2'. every cycle in the CFG that contains A also contains B. +// +//===----------------------------------------------------------------------===// + +#include "AMDGPULaneDominator.h" + +#include "llvm/ADT/DenseSet.h" +#include "llvm/ADT/SmallVector.h" +#include "llvm/CodeGen/MachineBasicBlock.h" + +namespace llvm { + +namespace AMDGPU { + +// Given machine basic blocks A and B where A dominates B, check whether +// A lane-dominates B. +// +// The check is conservative, i.e. there can be false-negatives. +bool laneDominates(MachineBasicBlock *A, MachineBasicBlock *B) { + // Check whether A is reachable from itself without going through B. + DenseSet<MachineBasicBlock *> Reachable; + SmallVector<MachineBasicBlock *, 8> Stack; + + Stack.push_back(A); + do { + MachineBasicBlock *MBB = Stack.back(); + Stack.pop_back(); + + for (MachineBasicBlock *Succ : MBB->successors()) { + if (Succ == A) + return false; + if (Succ != B && Reachable.insert(Succ).second) + Stack.push_back(Succ); + } + } while (!Stack.empty()); + + return true; +} + +} // namespace AMDGPU + +} // namespace llvm diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h new file mode 100644 index 00000000000..4f33a89a364 --- /dev/null +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPULaneDominator.h @@ -0,0 +1,24 @@ +//===- AMDGPULaneDominator.h ------------------------------------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPULANEDOMINATOR_H +#define LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPULANEDOMINATOR_H + +namespace llvm { + +class MachineBasicBlock; + +namespace AMDGPU { + +bool laneDominates(MachineBasicBlock *MBBA, MachineBasicBlock *MBBB); + +} // end namespace AMDGPU +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPULANEDOMINATOR_H diff --git a/llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt b/llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt index 01b80ebe8d3..c5ed32e4682 100644 --- a/llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt +++ b/llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt @@ -2,4 +2,5 @@ add_llvm_library(LLVMAMDGPUUtils AMDGPUBaseInfo.cpp AMDKernelCodeTUtils.cpp AMDGPUAsmUtils.cpp + AMDGPULaneDominator.cpp ) |

