diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/SVEInstrFormats.td | 28 |
2 files changed, 35 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td index 94f0be01b3c..a5569d2ad61 100644 --- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -125,6 +125,13 @@ let Predicates = [HasSVE] in { defm FDIVR_ZPmZ : sve_fp_2op_p_zds<0b1100, "fdivr">; defm FDIV_ZPmZ : sve_fp_2op_p_zds<0b1101, "fdiv">; + defm FADD_ZZZ : sve_fp_3op_u_zd<0b000, "fadd">; + defm FSUB_ZZZ : sve_fp_3op_u_zd<0b001, "fsub">; + defm FMUL_ZZZ : sve_fp_3op_u_zd<0b010, "fmul">; + defm FTSMUL_ZZZ : sve_fp_3op_u_zd<0b011, "ftsmul">; + defm FRECPS_ZZZ : sve_fp_3op_u_zd<0b110, "frecps">; + defm FRSQRTS_ZZZ : sve_fp_3op_u_zd<0b111, "frsqrts">; + defm FCADD_ZPmZ : sve_fp_fcadd<"fcadd">; defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla">; diff --git a/llvm/lib/Target/AArch64/SVEInstrFormats.td b/llvm/lib/Target/AArch64/SVEInstrFormats.td index 4bcde3edbcf..642e48f3063 100644 --- a/llvm/lib/Target/AArch64/SVEInstrFormats.td +++ b/llvm/lib/Target/AArch64/SVEInstrFormats.td @@ -987,6 +987,34 @@ multiclass sve_fp_2op_p_zds<bits<4> opc, string asm> { //===----------------------------------------------------------------------===// +// SVE Floating Point Arithmetic - Unpredicated Group +//===----------------------------------------------------------------------===// + +class sve_fp_3op_u_zd<bits<2> sz, bits<3> opc, string asm, + ZPRRegOp zprty> +: I<(outs zprty:$Zd), (ins zprty:$Zn, zprty:$Zm), + asm, "\t$Zd, $Zn, $Zm", + "", []>, Sched<[]> { + bits<5> Zd; + bits<5> Zm; + bits<5> Zn; + let Inst{31-24} = 0b01100101; + let Inst{23-22} = sz; + let Inst{21} = 0b0; + let Inst{20-16} = Zm; + let Inst{15-13} = 0b000; + let Inst{12-10} = opc; + let Inst{9-5} = Zn; + let Inst{4-0} = Zd; +} + +multiclass sve_fp_3op_u_zd<bits<3> opc, string asm> { + def _H : sve_fp_3op_u_zd<0b01, opc, asm, ZPR16>; + def _S : sve_fp_3op_u_zd<0b10, opc, asm, ZPR32>; + def _D : sve_fp_3op_u_zd<0b11, opc, asm, ZPR64>; +} + +//===----------------------------------------------------------------------===// // SVE Floating Point Fused Multiply-Add Group //===----------------------------------------------------------------------===// |
