diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterInfo.td | 16 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h | 9 |
3 files changed, 33 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.td b/llvm/lib/Target/ARM/ARMRegisterInfo.td index 668d374ef16..d6ac723d1cf 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.td +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.td @@ -13,7 +13,8 @@ include "ARMSystemRegister.td" //===----------------------------------------------------------------------===// // Registers are identified with 4-bit ID numbers. -class ARMReg<bits<16> Enc, string n, list<Register> subregs = []> : Register<n> { +class ARMReg<bits<16> Enc, string n, list<Register> subregs = [], + list<string> altNames = []> : Register<n, altNames> { let HWEncoding = Enc; let Namespace = "ARM"; let SubRegs = subregs; @@ -26,6 +27,11 @@ class ARMFReg<bits<16> Enc, string n> : Register<n> { let Namespace = "ARM"; } +let Namespace = "ARM", + FallbackRegAltNameIndex = NoRegAltName in { + def RegNamesRaw : RegAltNameIndex; +} + // Subregister indices. let Namespace = "ARM" in { def qqsub_0 : SubRegIndex<256>; @@ -83,9 +89,11 @@ def R9 : ARMReg< 9, "r9">, DwarfRegNum<[9]>; def R10 : ARMReg<10, "r10">, DwarfRegNum<[10]>; def R11 : ARMReg<11, "r11">, DwarfRegNum<[11]>; def R12 : ARMReg<12, "r12">, DwarfRegNum<[12]>; -def SP : ARMReg<13, "sp">, DwarfRegNum<[13]>; -def LR : ARMReg<14, "lr">, DwarfRegNum<[14]>; -def PC : ARMReg<15, "pc">, DwarfRegNum<[15]>; +let RegAltNameIndices = [RegNamesRaw] in { +def SP : ARMReg<13, "sp", [], ["r13"]>, DwarfRegNum<[13]>; +def LR : ARMReg<14, "lr", [], ["r14"]>, DwarfRegNum<[14]>; +def PC : ARMReg<15, "pc", [], ["r15"]>, DwarfRegNum<[15]>; +} } // Float registers diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index ee909f46af2..ec5fd16cd7d 100644 --- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -72,8 +72,20 @@ ARMInstPrinter::ARMInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI) : MCInstPrinter(MAI, MII, MRI) {} +bool ARMInstPrinter::applyTargetSpecificCLOption(StringRef Opt) { + if (Opt == "reg-names-std") { + DefaultAltIdx = ARM::NoRegAltName; + return true; + } + if (Opt == "reg-names-raw") { + DefaultAltIdx = ARM::RegNamesRaw; + return true; + } + return false; +} + void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { - OS << markup("<reg:") << getRegisterName(RegNo) << markup(">"); + OS << markup("<reg:") << getRegisterName(RegNo, DefaultAltIdx) << markup(">"); } void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O, diff --git a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h index b226633b0ef..bddcb8af524 100644 --- a/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h +++ b/llvm/lib/Target/ARM/InstPrinter/ARMInstPrinter.h @@ -13,6 +13,7 @@ #ifndef LLVM_LIB_TARGET_ARM_INSTPRINTER_ARMINSTPRINTER_H #define LLVM_LIB_TARGET_ARM_INSTPRINTER_ARMINSTPRINTER_H +#include "MCTargetDesc/ARMMCTargetDesc.h" #include "llvm/MC/MCInstPrinter.h" namespace llvm { @@ -22,6 +23,8 @@ public: ARMInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI); + bool applyTargetSpecificCLOption(StringRef Opt) override; + void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override; void printRegName(raw_ostream &OS, unsigned RegNo) const override; @@ -35,7 +38,8 @@ public: unsigned PrintMethodIdx, const MCSubtargetInfo &STI, raw_ostream &O); - static const char *getRegisterName(unsigned RegNo); + static const char *getRegisterName(unsigned RegNo, + unsigned AltIdx = ARM::NoRegAltName); void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O); @@ -235,6 +239,9 @@ public: template<int64_t Angle, int64_t Remainder> void printComplexRotationOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O); + +private: + unsigned DefaultAltIdx = ARM::NoRegAltName; }; } // end namespace llvm |
