diff options
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 6 | ||||
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 14 | ||||
-rw-r--r-- | llvm/lib/Transforms/Utils/LoopUnroll.cpp | 3 |
3 files changed, 9 insertions, 14 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index 7332b716203..2c9b5963537 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -497,8 +497,7 @@ void MachineLICMBase::HoistRegionPostRA() { // Walk the entire region, count number of defs for each register, and // collect potential LICM candidates. - const std::vector<MachineBasicBlock *> &Blocks = CurLoop->getBlocks(); - for (MachineBasicBlock *BB : Blocks) { + for (MachineBasicBlock *BB : CurLoop->getBlocks()) { // If the header of the loop containing this basic block is a landing pad, // then don't try to hoist instructions out of this loop. const MachineLoop *ML = MLI->getLoopFor(BB); @@ -570,8 +569,7 @@ void MachineLICMBase::HoistRegionPostRA() { /// Add register 'Reg' to the livein sets of BBs in the current loop, and make /// sure it is not killed by any instructions in the loop. void MachineLICMBase::AddToLiveIns(unsigned Reg) { - const std::vector<MachineBasicBlock *> &Blocks = CurLoop->getBlocks(); - for (MachineBasicBlock *BB : Blocks) { + for (MachineBasicBlock *BB : CurLoop->getBlocks()) { if (!BB->isLiveIn(Reg)) BB->addLiveIn(Reg); for (MachineInstr &MI : *BB) { diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp index 0e33976a58a..239cf49ca8a 100644 --- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp +++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp @@ -1011,10 +1011,9 @@ bool HexagonHardwareLoops::isInvalidLoopOperation(const MachineInstr *MI, /// the use of the hardware loop instruction. bool HexagonHardwareLoops::containsInvalidInstruction(MachineLoop *L, bool IsInnerHWLoop) const { - const std::vector<MachineBasicBlock *> &Blocks = L->getBlocks(); - LLVM_DEBUG(dbgs() << "\nhw_loop head, " << printMBBReference(*Blocks[0])); - for (unsigned i = 0, e = Blocks.size(); i != e; ++i) { - MachineBasicBlock *MBB = Blocks[i]; + LLVM_DEBUG(dbgs() << "\nhw_loop head, " + << printMBBReference(**L->block_begin())); + for (MachineBasicBlock *MBB : L->getBlocks()) { for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end(); MII != E; ++MII) { const MachineInstr *MI = &*MII; @@ -1368,11 +1367,10 @@ bool HexagonHardwareLoops::isLoopFeeder(MachineLoop *L, MachineBasicBlock *A, const MachineOperand *MO, LoopFeederMap &LoopFeederPhi) const { if (LoopFeederPhi.find(MO->getReg()) == LoopFeederPhi.end()) { - const std::vector<MachineBasicBlock *> &Blocks = L->getBlocks(); - LLVM_DEBUG(dbgs() << "\nhw_loop head, " << printMBBReference(*Blocks[0])); + LLVM_DEBUG(dbgs() << "\nhw_loop head, " + << printMBBReference(**L->block_begin())); // Ignore all BBs that form Loop. - for (unsigned i = 0, e = Blocks.size(); i != e; ++i) { - MachineBasicBlock *MBB = Blocks[i]; + for (MachineBasicBlock *MBB : L->getBlocks()) { if (A == MBB) return false; } diff --git a/llvm/lib/Transforms/Utils/LoopUnroll.cpp b/llvm/lib/Transforms/Utils/LoopUnroll.cpp index 04b8c1417e0..a8ec75c0baf 100644 --- a/llvm/lib/Transforms/Utils/LoopUnroll.cpp +++ b/llvm/lib/Transforms/Utils/LoopUnroll.cpp @@ -275,8 +275,7 @@ void llvm::simplifyLoopAfterUnroll(Loop *L, bool SimplifyIVs, LoopInfo *LI, // inserted code, doing constant propagation and dead code elimination as we // go. const DataLayout &DL = L->getHeader()->getModule()->getDataLayout(); - const std::vector<BasicBlock *> &NewLoopBlocks = L->getBlocks(); - for (BasicBlock *BB : NewLoopBlocks) { + for (BasicBlock *BB : L->getBlocks()) { for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) { Instruction *Inst = &*I++; |