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-rw-r--r--llvm/lib/Analysis/CallGraphSCCPass.cpp4
-rw-r--r--llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp2
-rw-r--r--llvm/lib/CodeGen/CodeGenPrepare.cpp2
-rw-r--r--llvm/lib/CodeGen/DetectDeadLanes.cpp2
-rw-r--r--llvm/lib/CodeGen/DwarfEHPrepare.cpp2
-rw-r--r--llvm/lib/CodeGen/EarlyIfConversion.cpp2
-rw-r--r--llvm/lib/CodeGen/ExecutionDepsFix.cpp4
-rw-r--r--llvm/lib/CodeGen/GCMetadata.cpp4
-rw-r--r--llvm/lib/CodeGen/GCRootLowering.cpp4
-rw-r--r--llvm/lib/CodeGen/GlobalMerge.cpp4
-rw-r--r--llvm/lib/CodeGen/InterleavedAccessPass.cpp2
-rw-r--r--llvm/lib/CodeGen/MIRPrintingPass.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineCombiner.cpp2
-rw-r--r--llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp2
-rw-r--r--llvm/lib/CodeGen/RegAllocBasic.cpp4
-rw-r--r--llvm/lib/CodeGen/RegAllocFast.cpp4
-rw-r--r--llvm/lib/CodeGen/RegAllocGreedy.cpp4
-rw-r--r--llvm/lib/CodeGen/RegAllocPBQP.cpp4
-rw-r--r--llvm/lib/CodeGen/RegUsageInfoCollector.cpp2
-rw-r--r--llvm/lib/CodeGen/RegUsageInfoPropagate.cpp2
-rw-r--r--llvm/lib/CodeGen/RenameIndependentSubregs.cpp2
-rw-r--r--llvm/lib/CodeGen/ResetMachineFunctionPass.cpp4
-rw-r--r--llvm/lib/CodeGen/ShrinkWrap.cpp4
-rw-r--r--llvm/lib/CodeGen/SjLjEHPrepare.cpp2
-rw-r--r--llvm/lib/CodeGen/WinEHPrepare.cpp2
-rw-r--r--llvm/lib/IR/LegacyPassManager.cpp12
-rw-r--r--llvm/lib/IR/Pass.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64AddressTypePromotion.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64CollectLOH.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp4
-rw-r--r--llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/R600Packetizer.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIFoldOperands.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIInsertSkips.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SIInsertWaits.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp2
-rw-r--r--llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SITypeRewriter.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp4
-rw-r--r--llvm/lib/Target/ARM/A15SDOptimizer.cpp4
-rw-r--r--llvm/lib/Target/ARM/ARMAsmPrinter.h2
-rw-r--r--llvm/lib/Target/ARM/ARMConstantIslandPass.cpp2
-rw-r--r--llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp2
-rw-r--r--llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp4
-rw-r--r--llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp6
-rw-r--r--llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp4
-rw-r--r--llvm/lib/Target/ARM/MLxExpansionPass.cpp2
-rw-r--r--llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp2
-rw-r--r--llvm/lib/Target/ARM/Thumb2SizeReduction.cpp2
-rw-r--r--llvm/lib/Target/BPF/BPFAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonAsmPrinter.h2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonGenExtract.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonGenInsert.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonGenMux.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonPeephole.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp4
-rw-r--r--llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp2
-rw-r--r--llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp2
-rw-r--r--llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp2
-rw-r--r--llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/MSP430/MSP430BranchSelector.cpp4
-rw-r--r--llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/Mips/Mips16HardFloat.cpp4
-rw-r--r--llvm/lib/Target/Mips/MipsAsmPrinter.h4
-rw-r--r--llvm/lib/Target/Mips/MipsConstantIslandPass.cpp4
-rw-r--r--llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp4
-rw-r--r--llvm/lib/Target/Mips/MipsHazardSchedule.cpp2
-rw-r--r--llvm/lib/Target/Mips/MipsISelDAGToDAG.h2
-rw-r--r--llvm/lib/Target/Mips/MipsLongBranch.cpp4
-rw-r--r--llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/Mips/MipsOptimizePICCall.cpp2
-rw-r--r--llvm/lib/Target/Mips/MipsOs16.cpp4
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXPeephole.cpp2
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp2
-rw-r--r--llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp18
-rw-r--r--llvm/lib/Target/PowerPC/PPCBranchSelector.cpp4
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp2
-rw-r--r--llvm/lib/Target/Sparc/DelaySlotFiller.cpp4
-rwxr-xr-xllvm/lib/Target/Sparc/LeonPasses.h8
-rw-r--r--llvm/lib/Target/Sparc/SparcAsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZAsmPrinter.h4
-rw-r--r--llvm/lib/Target/SystemZ/SystemZElimCompare.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZLongBranch.cpp4
-rw-r--r--llvm/lib/Target/SystemZ/SystemZShortenInst.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp4
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp4
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp2
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp4
-rw-r--r--llvm/lib/Target/X86/X86AsmPrinter.h2
-rw-r--r--llvm/lib/Target/X86/X86CallFrameOptimization.cpp2
-rw-r--r--llvm/lib/Target/X86/X86ExpandPseudo.cpp2
-rw-r--r--llvm/lib/Target/X86/X86FixupBWInsts.cpp4
-rw-r--r--llvm/lib/Target/X86/X86FixupLEAs.cpp2
-rw-r--r--llvm/lib/Target/X86/X86FixupSetCC.cpp2
-rw-r--r--llvm/lib/Target/X86/X86FloatingPoint.cpp2
-rw-r--r--llvm/lib/Target/X86/X86ISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp4
-rw-r--r--llvm/lib/Target/X86/X86OptimizeLEAs.cpp2
-rw-r--r--llvm/lib/Target/X86/X86PadShortFunction.cpp2
-rw-r--r--llvm/lib/Target/X86/X86VZeroUpper.cpp2
-rw-r--r--llvm/lib/Target/X86/X86WinAllocaExpander.cpp2
-rw-r--r--llvm/lib/Target/X86/X86WinEHState.cpp2
-rw-r--r--llvm/lib/Target/XCore/XCoreAsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp2
-rw-r--r--llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp2
-rw-r--r--llvm/lib/Transforms/IPO/FunctionImport.cpp2
-rw-r--r--llvm/lib/Transforms/IPO/SampleProfile.cpp2
-rw-r--r--llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp6
-rw-r--r--llvm/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp4
-rw-r--r--llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp2
-rw-r--r--llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp4
-rw-r--r--llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp2
-rw-r--r--llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp2
-rw-r--r--llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp8
-rw-r--r--llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp2
-rw-r--r--llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp6
-rw-r--r--llvm/lib/Transforms/Scalar/ConstantHoisting.cpp2
-rw-r--r--llvm/lib/Transforms/Scalar/LoadCombine.cpp2
-rw-r--r--llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp2
-rw-r--r--llvm/lib/Transforms/Scalar/SROA.cpp2
-rw-r--r--llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp2
-rw-r--r--llvm/lib/Transforms/Scalar/StructurizeCFG.cpp4
-rw-r--r--llvm/lib/Transforms/Utils/NameAnonGlobals.cpp2
-rw-r--r--llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp2
204 files changed, 230 insertions, 358 deletions
diff --git a/llvm/lib/Analysis/CallGraphSCCPass.cpp b/llvm/lib/Analysis/CallGraphSCCPass.cpp
index 34dc88ebd1c..9cef7814415 100644
--- a/llvm/lib/Analysis/CallGraphSCCPass.cpp
+++ b/llvm/lib/Analysis/CallGraphSCCPass.cpp
@@ -67,9 +67,7 @@ public:
Info.setPreservesAll();
}
- const char *getPassName() const override {
- return "CallGraph Pass Manager";
- }
+ StringRef getPassName() const override { return "CallGraph Pass Manager"; }
PMDataManager *getAsPMDataManager() override { return this; }
Pass *getAsPass() override { return this; }
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
index e8e0b103d09..782a22f2c71 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
@@ -48,7 +48,7 @@ namespace {
initializeWriteBitcodePassPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override { return "Bitcode Writer"; }
+ StringRef getPassName() const override { return "Bitcode Writer"; }
bool runOnModule(Module &M) override {
const ModuleSummaryIndex *Index =
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp
index 5213f3aaed5..db5396a5bdd 100644
--- a/llvm/lib/CodeGen/CodeGenPrepare.cpp
+++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp
@@ -164,7 +164,7 @@ class TypePromotionTransaction;
}
bool runOnFunction(Function &F) override;
- const char *getPassName() const override { return "CodeGen Prepare"; }
+ StringRef getPassName() const override { return "CodeGen Prepare"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
// FIXME: When we can selectively preserve passes, preserve the domtree.
diff --git a/llvm/lib/CodeGen/DetectDeadLanes.cpp b/llvm/lib/CodeGen/DetectDeadLanes.cpp
index 931624b60bb..6dc6de2e742 100644
--- a/llvm/lib/CodeGen/DetectDeadLanes.cpp
+++ b/llvm/lib/CodeGen/DetectDeadLanes.cpp
@@ -63,7 +63,7 @@ public:
static char ID;
DetectDeadLanes() : MachineFunctionPass(ID) {}
- const char *getPassName() const override { return "Detect Dead Lanes"; }
+ StringRef getPassName() const override { return "Detect Dead Lanes"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/CodeGen/DwarfEHPrepare.cpp b/llvm/lib/CodeGen/DwarfEHPrepare.cpp
index eae78a950d9..38af19a0444 100644
--- a/llvm/lib/CodeGen/DwarfEHPrepare.cpp
+++ b/llvm/lib/CodeGen/DwarfEHPrepare.cpp
@@ -71,7 +71,7 @@ namespace {
void getAnalysisUsage(AnalysisUsage &AU) const override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Exception handling preparation";
}
};
diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp
index 5f8141df4b9..72917279645 100644
--- a/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -602,7 +602,7 @@ public:
EarlyIfConverter() : MachineFunctionPass(ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override { return "Early If-Conversion"; }
+ StringRef getPassName() const override { return "Early If-Conversion"; }
private:
bool tryConvertIf(MachineBasicBlock*);
diff --git a/llvm/lib/CodeGen/ExecutionDepsFix.cpp b/llvm/lib/CodeGen/ExecutionDepsFix.cpp
index 400413be5b6..54164c94395 100644
--- a/llvm/lib/CodeGen/ExecutionDepsFix.cpp
+++ b/llvm/lib/CodeGen/ExecutionDepsFix.cpp
@@ -175,9 +175,7 @@ public:
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return "Execution dependency fix";
- }
+ StringRef getPassName() const override { return "Execution dependency fix"; }
private:
iterator_range<SmallVectorImpl<int>::const_iterator>
diff --git a/llvm/lib/CodeGen/GCMetadata.cpp b/llvm/lib/CodeGen/GCMetadata.cpp
index c8116a453d2..be21c7306da 100644
--- a/llvm/lib/CodeGen/GCMetadata.cpp
+++ b/llvm/lib/CodeGen/GCMetadata.cpp
@@ -32,7 +32,7 @@ class Printer : public FunctionPass {
public:
explicit Printer(raw_ostream &OS) : FunctionPass(ID), OS(OS) {}
- const char *getPassName() const override;
+ StringRef getPassName() const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
@@ -87,7 +87,7 @@ FunctionPass *llvm::createGCInfoPrinter(raw_ostream &OS) {
return new Printer(OS);
}
-const char *Printer::getPassName() const {
+StringRef Printer::getPassName() const {
return "Print Garbage Collector Information";
}
diff --git a/llvm/lib/CodeGen/GCRootLowering.cpp b/llvm/lib/CodeGen/GCRootLowering.cpp
index 5d4d0a1bb15..35246545ca9 100644
--- a/llvm/lib/CodeGen/GCRootLowering.cpp
+++ b/llvm/lib/CodeGen/GCRootLowering.cpp
@@ -45,7 +45,7 @@ public:
static char ID;
LowerIntrinsics();
- const char *getPassName() const override;
+ StringRef getPassName() const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool doInitialization(Module &M) override;
@@ -93,7 +93,7 @@ LowerIntrinsics::LowerIntrinsics() : FunctionPass(ID) {
initializeLowerIntrinsicsPass(*PassRegistry::getPassRegistry());
}
-const char *LowerIntrinsics::getPassName() const {
+StringRef LowerIntrinsics::getPassName() const {
return "Lower Garbage Collection Instructions";
}
diff --git a/llvm/lib/CodeGen/GlobalMerge.cpp b/llvm/lib/CodeGen/GlobalMerge.cpp
index de39e96a52d..c7609e9a4aa 100644
--- a/llvm/lib/CodeGen/GlobalMerge.cpp
+++ b/llvm/lib/CodeGen/GlobalMerge.cpp
@@ -182,9 +182,7 @@ namespace {
bool runOnFunction(Function &F) override;
bool doFinalization(Module &M) override;
- const char *getPassName() const override {
- return "Merge internal globals";
- }
+ StringRef getPassName() const override { return "Merge internal globals"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/CodeGen/InterleavedAccessPass.cpp b/llvm/lib/CodeGen/InterleavedAccessPass.cpp
index 3f111197685..eec282d53b0 100644
--- a/llvm/lib/CodeGen/InterleavedAccessPass.cpp
+++ b/llvm/lib/CodeGen/InterleavedAccessPass.cpp
@@ -70,7 +70,7 @@ public:
initializeInterleavedAccessPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override { return "Interleaved Access Pass"; }
+ StringRef getPassName() const override { return "Interleaved Access Pass"; }
bool runOnFunction(Function &F) override;
diff --git a/llvm/lib/CodeGen/MIRPrintingPass.cpp b/llvm/lib/CodeGen/MIRPrintingPass.cpp
index 8e7566a4e46..c690bcfad56 100644
--- a/llvm/lib/CodeGen/MIRPrintingPass.cpp
+++ b/llvm/lib/CodeGen/MIRPrintingPass.cpp
@@ -33,7 +33,7 @@ struct MIRPrintingPass : public MachineFunctionPass {
MIRPrintingPass() : MachineFunctionPass(ID), OS(dbgs()) {}
MIRPrintingPass(raw_ostream &OS) : MachineFunctionPass(ID), OS(OS) {}
- const char *getPassName() const override { return "MIR Printing Pass"; }
+ StringRef getPassName() const override { return "MIR Printing Pass"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/MachineCombiner.cpp b/llvm/lib/CodeGen/MachineCombiner.cpp
index 6b5c6ba8250..b4e217c4815 100644
--- a/llvm/lib/CodeGen/MachineCombiner.cpp
+++ b/llvm/lib/CodeGen/MachineCombiner.cpp
@@ -56,7 +56,7 @@ public:
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override { return "Machine InstCombiner"; }
+ StringRef getPassName() const override { return "Machine InstCombiner"; }
private:
bool doSubstitute(unsigned NewSize, unsigned OldSize);
diff --git a/llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp b/llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp
index 4f424ff292c..0d533c3f4f2 100644
--- a/llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp
+++ b/llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp
@@ -34,7 +34,7 @@ struct MachineFunctionPrinterPass : public MachineFunctionPass {
MachineFunctionPrinterPass(raw_ostream &os, const std::string &banner)
: MachineFunctionPass(ID), OS(os), Banner(banner) {}
- const char *getPassName() const override { return "MachineFunction Printer"; }
+ StringRef getPassName() const override { return "MachineFunction Printer"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index 78034788f8e..a558e371ad4 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -76,9 +76,7 @@ public:
RABasic();
/// Return the pass name.
- const char* getPassName() const override {
- return "Basic Register Allocator";
- }
+ StringRef getPassName() const override { return "Basic Register Allocator"; }
/// RABasic analysis usage.
void getAnalysisUsage(AnalysisUsage &AU) const override;
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index ab743099683..fd759bc372b 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -149,9 +149,7 @@ namespace {
spillImpossible = ~0u
};
public:
- const char *getPassName() const override {
- return "Fast Register Allocator";
- }
+ StringRef getPassName() const override { return "Fast Register Allocator"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 0c93d266004..410a3ed38bb 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -318,9 +318,7 @@ public:
RAGreedy();
/// Return the pass name.
- const char* getPassName() const override {
- return "Greedy Register Allocator";
- }
+ StringRef getPassName() const override { return "Greedy Register Allocator"; }
/// RAGreedy analysis usage.
void getAnalysisUsage(AnalysisUsage &AU) const override;
diff --git a/llvm/lib/CodeGen/RegAllocPBQP.cpp b/llvm/lib/CodeGen/RegAllocPBQP.cpp
index 64ef0084c1b..101b30bf3b6 100644
--- a/llvm/lib/CodeGen/RegAllocPBQP.cpp
+++ b/llvm/lib/CodeGen/RegAllocPBQP.cpp
@@ -99,9 +99,7 @@ public:
}
/// Return the pass name.
- const char* getPassName() const override {
- return "PBQP Register Allocator";
- }
+ StringRef getPassName() const override { return "PBQP Register Allocator"; }
/// PBQP analysis usage.
void getAnalysisUsage(AnalysisUsage &au) const override;
diff --git a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
index 22eb1cea830..ece44c28e9e 100644
--- a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
+++ b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
@@ -48,7 +48,7 @@ public:
initializeRegUsageInfoCollectorPass(Registry);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Register Usage Information Collector Pass";
}
diff --git a/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp b/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
index 759566147cc..5cc35bfeca6 100644
--- a/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
+++ b/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp
@@ -52,7 +52,7 @@ public:
initializeRegUsageInfoPropagationPassPass(Registry);
}
- const char *getPassName() const override { return RUIP_NAME; }
+ StringRef getPassName() const override { return RUIP_NAME; }
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/CodeGen/RenameIndependentSubregs.cpp b/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
index 73323fcb4de..153dffca83a 100644
--- a/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
+++ b/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
@@ -48,7 +48,7 @@ public:
static char ID;
RenameIndependentSubregs() : MachineFunctionPass(ID) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Rename Disconnected Subregister Components";
}
diff --git a/llvm/lib/CodeGen/ResetMachineFunctionPass.cpp b/llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
index f604e431289..451964199ba 100644
--- a/llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
+++ b/llvm/lib/CodeGen/ResetMachineFunctionPass.cpp
@@ -36,9 +36,7 @@ namespace {
ResetMachineFunction(bool EmitFallbackDiag = false)
: MachineFunctionPass(ID), EmitFallbackDiag(EmitFallbackDiag) {}
- const char *getPassName() const override {
- return "ResetMachineFunction";
- }
+ StringRef getPassName() const override { return "ResetMachineFunction"; }
bool runOnMachineFunction(MachineFunction &MF) override {
if (MF.getProperties().hasProperty(
diff --git a/llvm/lib/CodeGen/ShrinkWrap.cpp b/llvm/lib/CodeGen/ShrinkWrap.cpp
index 599fd87bfd1..4837495777d 100644
--- a/llvm/lib/CodeGen/ShrinkWrap.cpp
+++ b/llvm/lib/CodeGen/ShrinkWrap.cpp
@@ -199,9 +199,7 @@ public:
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
- return "Shrink Wrapping analysis";
- }
+ StringRef getPassName() const override { return "Shrink Wrapping analysis"; }
/// \brief Perform the shrink-wrapping analysis and update
/// the MachineFrameInfo attached to \p MF with the results.
diff --git a/llvm/lib/CodeGen/SjLjEHPrepare.cpp b/llvm/lib/CodeGen/SjLjEHPrepare.cpp
index ce01c5f23e5..209bbe54ea2 100644
--- a/llvm/lib/CodeGen/SjLjEHPrepare.cpp
+++ b/llvm/lib/CodeGen/SjLjEHPrepare.cpp
@@ -58,7 +58,7 @@ public:
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SJLJ Exception Handling preparation";
}
diff --git a/llvm/lib/CodeGen/WinEHPrepare.cpp b/llvm/lib/CodeGen/WinEHPrepare.cpp
index 041fb7b912b..d3dc401dc4f 100644
--- a/llvm/lib/CodeGen/WinEHPrepare.cpp
+++ b/llvm/lib/CodeGen/WinEHPrepare.cpp
@@ -62,7 +62,7 @@ public:
void getAnalysisUsage(AnalysisUsage &AU) const override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Windows exception handling preparation";
}
diff --git a/llvm/lib/IR/LegacyPassManager.cpp b/llvm/lib/IR/LegacyPassManager.cpp
index 8a4f142cd3b..f0e9f7731b5 100644
--- a/llvm/lib/IR/LegacyPassManager.cpp
+++ b/llvm/lib/IR/LegacyPassManager.cpp
@@ -193,9 +193,7 @@ public:
PMDataManager *getAsPMDataManager() override { return this; }
Pass *getAsPass() override { return this; }
- const char *getPassName() const override {
- return "BasicBlock Pass Manager";
- }
+ StringRef getPassName() const override { return "BasicBlock Pass Manager"; }
// Print passes managed by this manager
void dumpPassStructure(unsigned Offset) override {
@@ -340,9 +338,7 @@ public:
/// its runOnFunction() for function F.
Pass* getOnTheFlyPass(Pass *MP, AnalysisID PI, Function &F) override;
- const char *getPassName() const override {
- return "Module Pass Manager";
- }
+ StringRef getPassName() const override { return "Module Pass Manager"; }
PMDataManager *getAsPMDataManager() override { return this; }
Pass *getAsPass() override { return this; }
@@ -684,7 +680,7 @@ void PMTopLevelManager::schedulePass(Pass *P) {
if (PI && !PI->isAnalysis() && ShouldPrintBeforePass(PI)) {
Pass *PP = P->createPrinterPass(
- dbgs(), std::string("*** IR Dump Before ") + P->getPassName() + " ***");
+ dbgs(), ("*** IR Dump Before " + P->getPassName() + " ***").str());
PP->assignPassManager(activeStack, getTopLevelPassManagerType());
}
@@ -693,7 +689,7 @@ void PMTopLevelManager::schedulePass(Pass *P) {
if (PI && !PI->isAnalysis() && ShouldPrintAfterPass(PI)) {
Pass *PP = P->createPrinterPass(
- dbgs(), std::string("*** IR Dump After ") + P->getPassName() + " ***");
+ dbgs(), ("*** IR Dump After " + P->getPassName() + " ***").str());
PP->assignPassManager(activeStack, getTopLevelPassManagerType());
}
}
diff --git a/llvm/lib/IR/Pass.cpp b/llvm/lib/IR/Pass.cpp
index 69299fea763..94325293997 100644
--- a/llvm/lib/IR/Pass.cpp
+++ b/llvm/lib/IR/Pass.cpp
@@ -64,7 +64,7 @@ void Pass::dumpPassStructure(unsigned Offset) {
/// implemented in terms of the name that is registered by one of the
/// Registration templates, but can be overloaded directly.
///
-const char *Pass::getPassName() const {
+StringRef Pass::getPassName() const {
AnalysisID AID = getPassID();
const PassInfo *PI = PassRegistry::getPassRegistry()->getPassInfo(AID);
if (PI)
diff --git a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
index 847eafce5bd..e6afb42440a 100644
--- a/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
@@ -93,7 +93,7 @@ public:
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Workaround A53 erratum 835769 pass";
}
diff --git a/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp b/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
index d30bea7565f..0aa597bcdc5 100644
--- a/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
+++ b/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
@@ -125,7 +125,7 @@ public:
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "A57 FP Anti-dependency breaker";
}
diff --git a/llvm/lib/Target/AArch64/AArch64AddressTypePromotion.cpp b/llvm/lib/Target/AArch64/AArch64AddressTypePromotion.cpp
index b40f675e820..0cbb2db1134 100644
--- a/llvm/lib/Target/AArch64/AArch64AddressTypePromotion.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AddressTypePromotion.cpp
@@ -68,9 +68,7 @@ public:
initializeAArch64AddressTypePromotionPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
- return AARCH64_TYPE_PROMO_NAME;
- }
+ StringRef getPassName() const override { return AARCH64_TYPE_PROMO_NAME; }
/// Iterate over the functions and promote the computation of interesting
// sext instructions.
diff --git a/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp b/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
index 65af1b2ba30..bc2320dd20b 100644
--- a/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
@@ -90,9 +90,7 @@ public:
bool runOnMachineFunction(MachineFunction &F) override;
- const char *getPassName() const override {
- return AARCH64_ADVSIMD_NAME;
- }
+ StringRef getPassName() const override { return AARCH64_ADVSIMD_NAME; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index cd6694ddb2e..991bed026bb 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -56,9 +56,7 @@ public:
: AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this),
SM(*this), AArch64FI(nullptr) {}
- const char *getPassName() const override {
- return "AArch64 Assembly Printer";
- }
+ StringRef getPassName() const override { return "AArch64 Assembly Printer"; }
/// \brief Wrapper for MCInstLowering.lowerOperand() for the
/// tblgen'erated pseudo lowering.
diff --git a/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp b/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
index 9142f3ed9b2..c7c804b0bb4 100644
--- a/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
+++ b/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
@@ -88,9 +88,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return AARCH64_BR_RELAX_NAME;
- }
+ StringRef getPassName() const override { return AARCH64_BR_RELAX_NAME; }
};
char AArch64BranchRelaxation::ID = 0;
}
diff --git a/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp b/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
index 7ba3021a07f..6f8dd3e3ac0 100644
--- a/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
@@ -132,7 +132,7 @@ struct LDTLSCleanup : public MachineFunctionPass {
return Copy;
}
- const char *getPassName() const override { return TLSCLEANUP_PASS_NAME; }
+ StringRef getPassName() const override { return TLSCLEANUP_PASS_NAME; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
index b02b8d93b5b..7666011f75b 100644
--- a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
@@ -184,9 +184,7 @@ struct AArch64CollectLOH : public MachineFunctionPass {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return AARCH64_COLLECT_LOH_NAME;
- }
+ StringRef getPassName() const override { return AARCH64_COLLECT_LOH_NAME; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
diff --git a/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
index 5eea0e09787..8b186328d12 100644
--- a/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
@@ -105,7 +105,7 @@ public:
bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
int ToImm);
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AArch64 Condition Optimizer";
}
};
diff --git a/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp b/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
index f2b5ce49e93..da09b36cac9 100644
--- a/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
@@ -737,7 +737,7 @@ public:
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AArch64 Conditional Compares";
}
diff --git a/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp b/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
index e238c6dde40..90fd1ab7dba 100644
--- a/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
+++ b/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp
@@ -49,7 +49,7 @@ public:
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override { return AARCH64_DEAD_REG_DEF_NAME; }
+ StringRef getPassName() const override { return AARCH64_DEAD_REG_DEF_NAME; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
index e6d2ccd6a31..a708a171cfc 100644
--- a/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
@@ -37,9 +37,7 @@ public:
bool runOnMachineFunction(MachineFunction &Fn) override;
- const char *getPassName() const override {
- return AARCH64_EXPAND_PSEUDO_NAME;
- }
+ StringRef getPassName() const override { return AARCH64_EXPAND_PSEUDO_NAME; }
private:
bool expandMBB(MachineBasicBlock &MBB);
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 6fa0782222d..413c22eeb69 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -47,7 +47,7 @@ public:
: SelectionDAGISel(tm, OptLevel), Subtarget(nullptr),
ForCodeSize(false) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AArch64 Instruction Selection";
}
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 4f3a6ac69b1..0eebec63c3a 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -165,9 +165,7 @@ struct AArch64LoadStoreOpt : public MachineFunctionPass {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return AARCH64_LOAD_STORE_OPT_NAME;
- }
+ StringRef getPassName() const override { return AARCH64_LOAD_STORE_OPT_NAME; }
};
char AArch64LoadStoreOpt::ID = 0;
} // namespace
diff --git a/llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp b/llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
index 73932e7f35f..8693f76d7c3 100644
--- a/llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
@@ -105,7 +105,7 @@ public:
initializeAArch64PromoteConstantPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override { return "AArch64 Promote Constant"; }
+ StringRef getPassName() const override { return "AArch64 Promote Constant"; }
/// Iterate over the functions and promote the interesting constants into
/// global variables with module scope.
diff --git a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
index da3d6a0daee..8f45e6a80a3 100644
--- a/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
@@ -56,7 +56,7 @@ public:
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AArch64 Redundant Copy Elimination";
}
};
diff --git a/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp b/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
index 564d4ef9980..fe984ccbaf1 100644
--- a/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
+++ b/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp
@@ -42,7 +42,7 @@ public:
initializeAArch64StorePairSuppressPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override { return STPSUPPRESS_PASS_NAME; }
+ StringRef getPassName() const override { return STPSUPPRESS_PASS_NAME; }
bool runOnMachineFunction(MachineFunction &F) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
index 886b1b0f2b2..067a16a2af7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
@@ -27,7 +27,7 @@ class AMDGPUAlwaysInline : public ModulePass {
public:
AMDGPUAlwaysInline() : ModulePass(ID) { }
bool runOnModule(Module &M) override;
- const char *getPassName() const override { return "AMDGPU Always Inline Pass"; }
+ StringRef getPassName() const override { return "AMDGPU Always Inline Pass"; }
};
} // End anonymous namespace
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
index 60afba65694..c98d25e2018 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
@@ -36,7 +36,7 @@ public:
AMDGPUAnnotateKernelFeatures() : ModulePass(ID) { }
bool runOnModule(Module &M) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AMDGPU Annotate Kernel Features";
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
index 2010cc95226..16815affbf9 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
@@ -37,7 +37,9 @@ public:
FunctionPass(ID) { }
bool doInitialization(Module &M) override;
bool runOnFunction(Function &F) override;
- const char *getPassName() const override { return "AMDGPU Annotate Uniform Values"; }
+ StringRef getPassName() const override {
+ return "AMDGPU Annotate Uniform Values";
+ }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<DivergenceAnalysis>();
AU.setPreservesAll();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 544c7b86403..e9bc1191cba 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -95,7 +95,7 @@ AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)) {}
-const char *AMDGPUAsmPrinter::getPassName() const {
+StringRef AMDGPUAsmPrinter::getPassName() const {
return "AMDGPU Assembly Printer";
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
index 70f956a7023..f4e62ca0df2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
@@ -118,7 +118,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override;
+ StringRef getPassName() const override;
/// Implemented in AMDGPUMCInstLower.cpp
void EmitInstruction(const MachineInstr *MI) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
index 6304098639c..843001ae0f1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
@@ -114,9 +114,7 @@ public:
bool doInitialization(Module &M) override;
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
- return "AMDGPU IR optimizations";
- }
+ StringRef getPassName() const override { return "AMDGPU IR optimizations"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<DivergenceAnalysis>();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index bf3e1da5156..4f5f069e7f9 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -50,7 +50,7 @@ public:
virtual ~AMDGPUDAGToDAGISel();
bool runOnMachineFunction(MachineFunction &MF) override;
void Select(SDNode *N) override;
- const char *getPassName() const override;
+ StringRef getPassName() const override;
void PostprocessISelDAG() override;
private:
@@ -494,7 +494,7 @@ bool AMDGPUDAGToDAGISel::isUniformBr(const SDNode *N) const {
Term->getMetadata("structurizecfg.uniform");
}
-const char *AMDGPUDAGToDAGISel::getPassName() const {
+StringRef AMDGPUDAGToDAGISel::getPassName() const {
return "AMDGPU DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp b/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp
index 8bc7b53435b..410bd52d9c2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUOpenCLImageTypeLoweringPass.cpp
@@ -358,7 +358,7 @@ class AMDGPUOpenCLImageTypeLoweringPass : public ModulePass {
return transformKernels(M);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AMDGPU OpenCL Image Type Pass";
}
};
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
index ee22970ef15..296a8aa9c58 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
@@ -76,9 +76,7 @@ public:
bool doInitialization(Module &M) override;
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
- return "AMDGPU Promote Alloca";
- }
+ StringRef getPassName() const override { return "AMDGPU Promote Alloca"; }
void handleAlloca(AllocaInst &I);
diff --git a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
index e82c9ede9db..7faeccdc5df 100644
--- a/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
@@ -138,7 +138,7 @@ public:
initializeAMDGPUCFGStructurizerPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AMDGPU Control Flow Graph structurizer Pass";
}
diff --git a/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp b/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
index 3ccde79e2df..d0aba38f786 100644
--- a/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
@@ -66,7 +66,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override;
+ StringRef getPassName() const override;
};
char R600ClauseMergePass::ID = 0;
@@ -201,7 +201,7 @@ bool R600ClauseMergePass::runOnMachineFunction(MachineFunction &MF) {
return false;
}
-const char *R600ClauseMergePass::getPassName() const {
+StringRef R600ClauseMergePass::getPassName() const {
return "R600 Merge Clause Markers Pass";
}
diff --git a/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp b/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
index 65dae23d5fd..45b36d3d3eb 100644
--- a/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
@@ -684,7 +684,7 @@ public:
return false;
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "R600 Control Flow Finalizer Pass";
}
};
diff --git a/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp b/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
index 783dba43aaf..9a5db6ccc67 100644
--- a/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
+++ b/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
@@ -319,7 +319,7 @@ public:
return false;
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "R600 Emit Clause Markers Pass";
}
};
diff --git a/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp b/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
index 284900f32a0..3e46e638761 100644
--- a/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
@@ -42,7 +42,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "R600 Expand special instructions pass";
}
};
diff --git a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
index b01bab2e59c..58d4bed3b58 100644
--- a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
+++ b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
@@ -121,7 +121,7 @@ public:
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "R600 Vector Registers Merge Pass";
}
diff --git a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
index c84866469ae..c0f08cff7c4 100644
--- a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
@@ -47,9 +47,7 @@ public:
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
- return "R600 Packetizer";
- }
+ StringRef getPassName() const override { return "R600 Packetizer"; }
bool runOnMachineFunction(MachineFunction &Fn) override;
};
diff --git a/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp b/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
index 5e73a7d90cd..d70f52e0f29 100644
--- a/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
+++ b/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
@@ -102,9 +102,7 @@ public:
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
- return "SI annotate control flow";
- }
+ StringRef getPassName() const override { return "SI annotate control flow"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LoopInfoWrapperPass>();
diff --git a/llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp b/llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp
index 65ceff3930a..62ebef8e91a 100644
--- a/llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp
+++ b/llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp
@@ -38,7 +38,7 @@ public:
static char ID;
SIDebuggerInsertNops() : MachineFunctionPass(ID) { }
- const char *getPassName() const override { return PASS_NAME; }
+ StringRef getPassName() const override { return PASS_NAME; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp b/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp
index 636750dcfba..d4d3959658e 100644
--- a/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixControlFlowLiveIntervals.cpp
@@ -37,9 +37,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Fix CF Live Intervals";
- }
+ StringRef getPassName() const override { return "SI Fix CF Live Intervals"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervals>();
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
index 9e0086b7908..288e5b1524f 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
@@ -89,9 +89,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Fix SGPR copies";
- }
+ StringRef getPassName() const override { return "SI Fix SGPR copies"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index e1257b1d33e..39eaf75568c 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -36,9 +36,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Fold Operands";
- }
+ StringRef getPassName() const override { return "SI Fold Operands"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp b/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
index ade0451ce50..9df0838ea61 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
@@ -60,7 +60,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SI insert s_cbranch_execz instructions";
}
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
index 71afd0b02c1..2d9d653e7ff 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
@@ -148,7 +148,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SI insert wait instructions";
}
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
index fe729cd048d..a5fc08e86a0 100644
--- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -98,9 +98,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Load / Store Optimizer";
- }
+ StringRef getPassName() const override { return "SI Load / Store Optimizer"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
index d81a650a291..cc795172af6 100644
--- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
@@ -92,7 +92,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SI Lower control flow pseudo instructions";
}
diff --git a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
index 396764b1850..9e62980940b 100644
--- a/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+++ b/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
@@ -41,9 +41,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Lower i1 Copies";
- }
+ StringRef getPassName() const override { return "SI Lower i1 Copies"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
index b8994f6f949..421ac72993b 100644
--- a/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
+++ b/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
@@ -33,7 +33,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SI optimize exec mask operations";
}
diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index 010c909774f..26bc2b4e35e 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -45,9 +45,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Shrink Instructions";
- }
+ StringRef getPassName() const override { return "SI Shrink Instructions"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/AMDGPU/SITypeRewriter.cpp b/llvm/lib/Target/AMDGPU/SITypeRewriter.cpp
index facc0c7df1d..aad68537f77 100644
--- a/llvm/lib/Target/AMDGPU/SITypeRewriter.cpp
+++ b/llvm/lib/Target/AMDGPU/SITypeRewriter.cpp
@@ -42,9 +42,7 @@ public:
SITypeRewriter() : FunctionPass(ID) { }
bool doInitialization(Module &M) override;
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
- return "SI Type Rewriter";
- }
+ StringRef getPassName() const override { return "SI Type Rewriter"; }
void visitLoadInst(LoadInst &I);
void visitCallInst(CallInst &I);
void visitBitCast(BitCastInst &I);
diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
index 952fb5c5189..21518389b8b 100644
--- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
@@ -153,9 +153,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "SI Whole Quad Mode";
- }
+ StringRef getPassName() const override { return "SI Whole Quad Mode"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervals>();
diff --git a/llvm/lib/Target/ARM/A15SDOptimizer.cpp b/llvm/lib/Target/ARM/A15SDOptimizer.cpp
index 9228cc2d7a9..89859ba063d 100644
--- a/llvm/lib/Target/ARM/A15SDOptimizer.cpp
+++ b/llvm/lib/Target/ARM/A15SDOptimizer.cpp
@@ -52,9 +52,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &Fn) override;
- const char *getPassName() const override {
- return "ARM A15 S->D optimizer";
- }
+ StringRef getPassName() const override { return "ARM A15 S->D optimizer"; }
private:
const ARMBaseInstrInfo *TII;
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.h b/llvm/lib/Target/ARM/ARMAsmPrinter.h
index 9eafde55d4d..277f725fc77 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.h
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.h
@@ -70,7 +70,7 @@ public:
explicit ARMAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer);
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "ARM Assembly / Object Emitter";
}
diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
index d2e0725581d..b18835ca8a5 100644
--- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -200,7 +200,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "ARM constant island placement and branch shortening pass";
}
diff --git a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
index 9ce92f0c415..e2c386348ed 100644
--- a/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
@@ -56,7 +56,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "ARM pseudo instruction expansion pass";
}
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 977a08200a4..6eb4d463965 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -70,9 +70,7 @@ public:
return true;
}
- const char *getPassName() const override {
- return "ARM Instruction Selection";
- }
+ StringRef getPassName() const override { return "ARM Instruction Selection"; }
void PreprocessISelDAG() override;
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index 375a8b5e419..f638b94a2a9 100644
--- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -98,9 +98,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return ARM_LOAD_STORE_OPT_NAME;
- }
+ StringRef getPassName() const override { return ARM_LOAD_STORE_OPT_NAME; }
private:
/// A set of load/store MachineInstrs with same base register sorted by
@@ -1953,7 +1951,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &Fn) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return ARM_PREALLOC_LOAD_STORE_OPT_NAME;
}
diff --git a/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp b/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
index fd67ebf26bb..581d5fe159f 100644
--- a/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
+++ b/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp
@@ -32,9 +32,7 @@ public:
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return "optimise barriers pass";
- }
+ StringRef getPassName() const override { return "optimise barriers pass"; }
};
char ARMOptimizeBarriersPass::ID = 0;
}
diff --git a/llvm/lib/Target/ARM/MLxExpansionPass.cpp b/llvm/lib/Target/ARM/MLxExpansionPass.cpp
index 26745be947e..744761bcddb 100644
--- a/llvm/lib/Target/ARM/MLxExpansionPass.cpp
+++ b/llvm/lib/Target/ARM/MLxExpansionPass.cpp
@@ -43,7 +43,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &Fn) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "ARM MLA / MLS expansion pass";
}
diff --git a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
index 01736be78cc..d01fc8c40dd 100644
--- a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
+++ b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
@@ -41,7 +41,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Thumb IT blocks insertion pass";
}
diff --git a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
index 07158f9b1cf..8208e7e2477 100644
--- a/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
+++ b/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
@@ -151,7 +151,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Thumb2 instruction size reduction pass";
}
diff --git a/llvm/lib/Target/BPF/BPFAsmPrinter.cpp b/llvm/lib/Target/BPF/BPFAsmPrinter.cpp
index 1078b065218..19bac645799 100644
--- a/llvm/lib/Target/BPF/BPFAsmPrinter.cpp
+++ b/llvm/lib/Target/BPF/BPFAsmPrinter.cpp
@@ -38,7 +38,7 @@ public:
explicit BPFAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)) {}
- const char *getPassName() const override { return "BPF Assembly Printer"; }
+ StringRef getPassName() const override { return "BPF Assembly Printer"; }
void EmitInstruction(const MachineInstr *MI) override;
};
diff --git a/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp b/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
index ac2af036b6f..12091449cc1 100644
--- a/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
+++ b/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
@@ -38,7 +38,7 @@ class BPFDAGToDAGISel : public SelectionDAGISel {
public:
explicit BPFDAGToDAGISel(BPFTargetMachine &TM) : SelectionDAGISel(TM) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "BPF DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.h b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.h
index a78d97e2842..775da03e0f8 100644
--- a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.h
+++ b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.h
@@ -33,7 +33,7 @@ namespace llvm {
return AsmPrinter::runOnMachineFunction(Fn);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Assembly Printer";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
index 1bca47ff603..ea0c7345225 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
@@ -144,7 +144,7 @@ namespace {
HexagonBitSimplify() : MachineFunctionPass(ID), MDT(0) {
initializeHexagonBitSimplifyPass(*PassRegistry::getPassRegistry());
}
- virtual const char *getPassName() const {
+ virtual StringRef getPassName() const {
return "Hexagon bit simplification";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
diff --git a/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp b/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp
index 75cfb91ebc2..f1599753f87 100644
--- a/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp
@@ -44,7 +44,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Branch Relaxation";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp b/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
index 03b9c631578..2f8fe6e087f 100644
--- a/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp
@@ -45,9 +45,7 @@ public:
initializeHexagonCFGOptimizerPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
- return "Hexagon CFG Optimizer";
- }
+ StringRef getPassName() const override { return "Hexagon CFG Optimizer"; }
bool runOnMachineFunction(MachineFunction &Fn) override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
diff --git a/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp b/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
index 6b4450cdc24..6ed34d95f9b 100644
--- a/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
@@ -82,9 +82,7 @@ namespace {
initializeHexagonCommonGEPPass(*PassRegistry::getPassRegistry());
}
virtual bool runOnFunction(Function &F);
- virtual const char *getPassName() const {
- return "Hexagon Common GEP";
- }
+ virtual StringRef getPassName() const { return "Hexagon Common GEP"; }
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<DominatorTreeWrapperPass>();
diff --git a/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp b/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
index b4752135641..ff8644b0e03 100644
--- a/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
@@ -1888,7 +1888,7 @@ namespace {
PassRegistry &Registry = *PassRegistry::getPassRegistry();
initializeHexagonConstPropagationPass(Registry);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Constant Propagation";
}
bool runOnMachineFunction(MachineFunction &MF) override {
diff --git a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
index 119be1ddbe7..80b49bc01f2 100644
--- a/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
@@ -77,7 +77,7 @@ public:
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Copy-To-Combine Pass";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
index bcb8dce927f..77b3aebf586 100644
--- a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
@@ -137,7 +137,7 @@ namespace {
HII(0), TRI(0), MFN(0), MRI(0), MDT(0), MLI(0) {
initializeHexagonEarlyIfConversionPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon early if conversion";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
diff --git a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
index 8c936d996cb..3685b9102b4 100644
--- a/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
@@ -136,9 +136,7 @@ namespace {
initializeHexagonExpandCondsetsPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
- return "Hexagon Expand Condsets";
- }
+ StringRef getPassName() const override { return "Hexagon Expand Condsets"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervals>();
AU.addPreserved<LiveIntervals>();
diff --git a/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp b/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp
index acb1ef2d292..dfd1f1d4f88 100644
--- a/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp
@@ -50,7 +50,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Hardware Loop Fixup";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp b/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
index ca10846653a..5737f3f50b4 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
@@ -52,7 +52,7 @@ namespace {
HexagonGenExtract() : FunctionPass(ID), ExtractCount(0) {
initializeHexagonGenExtractPass(*PassRegistry::getPassRegistry());
}
- virtual const char *getPassName() const override {
+ virtual StringRef getPassName() const override {
return "Hexagon generate \"extract\" instructions";
}
virtual bool runOnFunction(Function &F) override;
diff --git a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
index cb55a7c351a..5ca04c5c384 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
@@ -467,7 +467,7 @@ namespace {
HexagonGenInsert() : MachineFunctionPass(ID), HII(0), HRI(0) {
initializeHexagonGenInsertPass(*PassRegistry::getPassRegistry());
}
- virtual const char *getPassName() const {
+ virtual StringRef getPassName() const {
return "Hexagon generate \"insert\" instructions";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
diff --git a/llvm/lib/Target/Hexagon/HexagonGenMux.cpp b/llvm/lib/Target/Hexagon/HexagonGenMux.cpp
index 2b71cc1edcd..a0f1c7e96f9 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenMux.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenMux.cpp
@@ -42,7 +42,7 @@ namespace {
HexagonGenMux() : MachineFunctionPass(ID), HII(0), HRI(0) {
initializeHexagonGenMuxPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon generate mux instructions";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
diff --git a/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp b/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
index dcfd3e8317a..46f5a52398a 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
@@ -64,7 +64,7 @@ namespace {
HexagonGenPredicate() : MachineFunctionPass(ID), TII(0), TRI(0), MRI(0) {
initializeHexagonGenPredicatePass(*PassRegistry::getPassRegistry());
}
- virtual const char *getPassName() const {
+ virtual StringRef getPassName() const {
return "Hexagon generate predicate operations";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
diff --git a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
index bcb05541c4c..635e2e4cec5 100644
--- a/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
@@ -94,7 +94,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override { return "Hexagon Hardware Loops"; }
+ StringRef getPassName() const override { return "Hexagon Hardware Loops"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineDominatorTree>();
diff --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
index b00b58cb102..c44e9314943 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -82,7 +82,7 @@ public:
bool SelectGlobalAddress(SDValue &N, SDValue &R, bool UseGP);
bool SelectAddrFI(SDValue &N, SDValue &R);
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp b/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
index bc8eefce707..b5e8c84faa1 100644
--- a/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
@@ -78,9 +78,7 @@ namespace {
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
- return "Hexagon NewValueJump";
- }
+ StringRef getPassName() const override { return "Hexagon NewValueJump"; }
bool runOnMachineFunction(MachineFunction &Fn) override;
MachineFunctionProperties getRequiredProperties() const override {
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
index 6d176c1a0eb..2ea7003bab4 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
@@ -52,7 +52,7 @@ public:
PassRegistry &R = *PassRegistry::getPassRegistry();
initializeHexagonOptAddrModePass(R);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Optimize addressing mode of load/store";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
diff --git a/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp b/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp
index 1c7495a5aa2..101de3d8fbe 100644
--- a/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp
@@ -37,9 +37,7 @@ namespace {
}
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
- return "Remove sign extends";
- }
+ StringRef getPassName() const override { return "Remove sign extends"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addPreserved<StackProtector>();
diff --git a/llvm/lib/Target/Hexagon/HexagonPeephole.cpp b/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
index 8d1ddeb3aaf..e83629428ca 100644
--- a/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
@@ -93,7 +93,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon optimize redundant zero and size extends";
}
diff --git a/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp b/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
index a9206bd63f3..2cd184dd622 100644
--- a/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
@@ -50,7 +50,7 @@ namespace {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon RDF optimizations";
}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp b/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
index d15d6942797..67c481a97af 100644
--- a/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
@@ -43,7 +43,7 @@ namespace {
PassRegistry &R = *PassRegistry::getPassRegistry();
initializeHexagonSplitConst32AndConst64Pass(R);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Split Const32s and Const64s";
}
bool runOnMachineFunction(MachineFunction &Fn) override;
diff --git a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
index e4e259be139..05d284ce9f4 100644
--- a/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
@@ -47,7 +47,7 @@ namespace {
TII(nullptr) {
initializeHexagonSplitDoubleRegsPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon Split Double Registers";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
diff --git a/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp b/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
index 54bc3cf6f6f..b0bd09dc944 100644
--- a/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
@@ -65,9 +65,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
- return "Hexagon Store Widening";
- }
+ StringRef getPassName() const override { return "Hexagon Store Widening"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<AAResultsWrapperPass>();
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
index 1a7c4b30797..7b1247d815a 100644
--- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -74,9 +74,7 @@ namespace {
AU.addPreserved<MachineLoopInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
}
- const char *getPassName() const override {
- return "Hexagon Packetizer";
- }
+ StringRef getPassName() const override { return "Hexagon Packetizer"; }
bool runOnMachineFunction(MachineFunction &Fn) override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
diff --git a/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp b/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp
index 19f47683a2d..5920ef715af 100644
--- a/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp
@@ -44,7 +44,7 @@ class HexagonVectorPrint : public MachineFunctionPass {
initializeHexagonVectorPrintPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Hexagon VectorPrint pass";
}
bool runOnMachineFunction(MachineFunction &Fn) override;
diff --git a/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp b/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
index 35bf5144de9..97f2e99a429 100644
--- a/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
+++ b/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
@@ -45,7 +45,7 @@ public:
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)) {}
- const char *getPassName() const override { return "Lanai Assembly Printer"; }
+ StringRef getPassName() const override { return "Lanai Assembly Printer"; }
void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp b/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
index be940904922..802232b0582 100644
--- a/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
+++ b/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
@@ -42,7 +42,7 @@ struct Filler : public MachineFunctionPass {
static char ID;
explicit Filler() : MachineFunctionPass(ID) {}
- const char *getPassName() const override { return "Lanai Delay Slot Filler"; }
+ StringRef getPassName() const override { return "Lanai Delay Slot Filler"; }
bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
diff --git a/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp b/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
index 29bc6e8a6c5..5aefe869b4c 100644
--- a/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
@@ -56,7 +56,7 @@ public:
}
// Pass Name
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Lanai DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp b/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
index 0d66a785db4..7259c02194c 100644
--- a/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
+++ b/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
@@ -61,7 +61,7 @@ public:
initializeLanaiMemAluCombinerPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Lanai load / store optimization pass";
}
diff --git a/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp b/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
index 4342c10a1bf..fe1ce7bb8bd 100644
--- a/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
+++ b/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
@@ -42,9 +42,7 @@ namespace {
MSP430AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)) {}
- const char *getPassName() const override {
- return "MSP430 Assembly Printer";
- }
+ StringRef getPassName() const override { return "MSP430 Assembly Printer"; }
void printOperand(const MachineInstr *MI, int OpNum,
raw_ostream &O, const char* Modifier = nullptr);
diff --git a/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp b/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
index 13e6a4666ca..69a8b6ad154 100644
--- a/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
+++ b/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
@@ -44,9 +44,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return "MSP430 Branch Selector";
- }
+ StringRef getPassName() const override { return "MSP430 Branch Selector"; }
};
char MSP430BSel::ID = 0;
}
diff --git a/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp b/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
index 69c609d04b5..6e481b68e03 100644
--- a/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
@@ -95,7 +95,7 @@ namespace {
MSP430DAGToDAGISel(MSP430TargetMachine &TM, CodeGenOpt::Level OptLevel)
: SelectionDAGISel(TM, OptLevel) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "MSP430 DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/Mips/Mips16HardFloat.cpp b/llvm/lib/Target/Mips/Mips16HardFloat.cpp
index d2d1c65e40d..191006d6463 100644
--- a/llvm/lib/Target/Mips/Mips16HardFloat.cpp
+++ b/llvm/lib/Target/Mips/Mips16HardFloat.cpp
@@ -30,9 +30,7 @@ namespace {
Mips16HardFloat(MipsTargetMachine &TM_) : ModulePass(ID), TM(TM_) {}
- const char *getPassName() const override {
- return "MIPS16 Hard Float Pass";
- }
+ StringRef getPassName() const override { return "MIPS16 Hard Float Pass"; }
bool runOnModule(Module &M) override;
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.h b/llvm/lib/Target/Mips/MipsAsmPrinter.h
index f30141fc918..259e557e128 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.h
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.h
@@ -103,9 +103,7 @@ public:
: AsmPrinter(TM, std::move(Streamer)), MCP(nullptr),
InConstantPool(false), MCInstLowering(*this) {}
- const char *getPassName() const override {
- return "Mips Assembly Printer";
- }
+ StringRef getPassName() const override { return "Mips Assembly Printer"; }
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
index c6f5e6bec20..08b8ed31ccb 100644
--- a/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
+++ b/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
@@ -356,9 +356,7 @@ namespace {
: MachineFunctionPass(ID), STI(nullptr), MF(nullptr), MCP(nullptr),
PrescannedForConstants(false) {}
- const char *getPassName() const override {
- return "Mips Constant Islands";
- }
+ StringRef getPassName() const override { return "Mips Constant Islands"; }
bool runOnMachineFunction(MachineFunction &F) override;
diff --git a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
index 11b4e7dc832..cd206abda36 100644
--- a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -192,9 +192,7 @@ namespace {
Filler(TargetMachine &tm)
: MachineFunctionPass(ID), TM(tm) { }
- const char *getPassName() const override {
- return "Mips Delay Slot Filler";
- }
+ StringRef getPassName() const override { return "Mips Delay Slot Filler"; }
bool runOnMachineFunction(MachineFunction &F) override {
bool Changed = false;
diff --git a/llvm/lib/Target/Mips/MipsHazardSchedule.cpp b/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
index 4a1b5d70f80..7ff7b15113c 100644
--- a/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
+++ b/llvm/lib/Target/Mips/MipsHazardSchedule.cpp
@@ -70,7 +70,7 @@ class MipsHazardSchedule : public MachineFunctionPass {
public:
MipsHazardSchedule() : MachineFunctionPass(ID) {}
- const char *getPassName() const override { return "Mips Hazard Schedule"; }
+ StringRef getPassName() const override { return "Mips Hazard Schedule"; }
bool runOnMachineFunction(MachineFunction &F) override;
diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.h b/llvm/lib/Target/Mips/MipsISelDAGToDAG.h
index b111397ba58..20bdd4aa8f5 100644
--- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.h
+++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.h
@@ -35,7 +35,7 @@ public:
: SelectionDAGISel(TM, OL), Subtarget(nullptr) {}
// Pass Name
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "MIPS DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/Mips/MipsLongBranch.cpp b/llvm/lib/Target/Mips/MipsLongBranch.cpp
index 5eb3e7b01bb..1087d0e0140 100644
--- a/llvm/lib/Target/Mips/MipsLongBranch.cpp
+++ b/llvm/lib/Target/Mips/MipsLongBranch.cpp
@@ -66,9 +66,7 @@ namespace {
: MachineFunctionPass(ID), TM(tm), IsPIC(TM.isPositionIndependent()),
ABI(static_cast<const MipsTargetMachine &>(TM).getABI()) {}
- const char *getPassName() const override {
- return "Mips Long Branch";
- }
+ StringRef getPassName() const override { return "Mips Long Branch"; }
bool runOnMachineFunction(MachineFunction &F) override;
diff --git a/llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
index b18a673912f..cf85eb3f241 100644
--- a/llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
@@ -26,7 +26,7 @@ namespace {
: MachineFunctionPass(ID), TM(TM_) {}
// Pass Name
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "MIPS DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp b/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
index 16c8d126e9b..441a2dbec9b 100644
--- a/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
+++ b/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
@@ -61,7 +61,7 @@ class OptimizePICCall : public MachineFunctionPass {
public:
OptimizePICCall(TargetMachine &tm) : MachineFunctionPass(ID) {}
- const char *getPassName() const override { return "Mips OptimizePICCall"; }
+ StringRef getPassName() const override { return "Mips OptimizePICCall"; }
bool runOnMachineFunction(MachineFunction &F) override;
diff --git a/llvm/lib/Target/Mips/MipsOs16.cpp b/llvm/lib/Target/Mips/MipsOs16.cpp
index 8136907de4d..51ac5620f58 100644
--- a/llvm/lib/Target/Mips/MipsOs16.cpp
+++ b/llvm/lib/Target/Mips/MipsOs16.cpp
@@ -35,9 +35,7 @@ namespace {
MipsOs16() : ModulePass(ID) {}
- const char *getPassName() const override {
- return "MIPS Os16 Optimization";
- }
+ StringRef getPassName() const override { return "MIPS Os16 Optimization"; }
bool runOnModule(Module &M) override;
};
diff --git a/llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp b/llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
index c6e64559456..bed52293197 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAllocaHoisting.cpp
@@ -30,7 +30,7 @@ public:
AU.addPreserved<StackProtector>();
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "NVPTX specific alloca hoisting";
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
index 85660fbdb26..3dcc0e358a1 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
@@ -195,7 +195,7 @@ class LLVM_LIBRARY_VISIBILITY NVPTXAsmPrinter : public AsmPrinter {
void emitSrcInText(StringRef filename, unsigned line);
private:
- const char *getPassName() const override { return "NVPTX Assembly Printer"; }
+ StringRef getPassName() const override { return "NVPTX Assembly Printer"; }
const Function *F;
std::string CurrentFnName;
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
index d53c92f1eff..0591035a6aa 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
+++ b/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
@@ -40,7 +40,7 @@ public:
CodeGenOpt::Level OptLevel);
// Pass Name
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "NVPTX DAG->DAG Pattern Instruction Selection";
}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
index 23f482e1843..b925b632ee4 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp
@@ -47,7 +47,7 @@ struct NVPTXLowerAggrCopies : public FunctionPass {
static const unsigned MaxAggrCopySize = 128;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Lower aggregate copies/intrinsics into loops";
}
};
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
index fa1a3ef3fe2..fcedd382286 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
@@ -47,7 +47,7 @@ class NVPTXLowerAlloca : public BasicBlockPass {
public:
static char ID; // Pass identification, replacement for typeid
NVPTXLowerAlloca() : BasicBlockPass(ID) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "convert address space of alloca'ed memory to local";
}
};
diff --git a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
index eaf45c8c9ff..77fd9e19fc0 100644
--- a/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
@@ -124,7 +124,7 @@ public:
static char ID; // Pass identification, replacement for typeid
NVPTXLowerArgs(const NVPTXTargetMachine *TM = nullptr)
: FunctionPass(ID), TM(TM) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Lower pointer arguments of CUDA kernels";
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp b/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
index 7d0cd553e03..49e639793ef 100644
--- a/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
@@ -57,7 +57,7 @@ struct NVPTXPeephole : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "NVPTX optimize redundant cvta.to.local instruction";
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp b/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
index 5a83371b07f..2022caca76e 100644
--- a/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
@@ -36,7 +36,7 @@ public:
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "NVPTX Replace Image Handles";
}
private:
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 5813abe527d..e5c93950604 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -74,16 +74,14 @@ public:
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
- const char *getPassName() const override {
- return "PowerPC Assembly Printer";
- }
+ StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
- MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
+ MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
- virtual bool doInitialization(Module &M) override {
- if (!TOC.empty())
- TOC.clear();
- return AsmPrinter::doInitialization(M);
+ virtual bool doInitialization(Module &M) override {
+ if (!TOC.empty())
+ TOC.clear();
+ return AsmPrinter::doInitialization(M);
}
void EmitInstruction(const MachineInstr *MI) override;
@@ -115,7 +113,7 @@ public:
std::unique_ptr<MCStreamer> Streamer)
: PPCAsmPrinter(TM, std::move(Streamer)) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Linux PPC Assembly Printer";
}
@@ -136,7 +134,7 @@ public:
std::unique_ptr<MCStreamer> Streamer)
: PPCAsmPrinter(TM, std::move(Streamer)) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Darwin PPC Assembly Printer";
}
diff --git a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
index 962a7b8672e..6bcb062aad8 100644
--- a/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -53,9 +53,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
- return "PowerPC Branch Selector";
- }
+ StringRef getPassName() const override { return "PowerPC Branch Selector"; }
};
char PPCBSel::ID = 0;
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 8b5fc515189..6f8f566337b 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -215,7 +215,7 @@ namespace {
void InsertVRSaveCode(MachineFunction &MF);
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "PowerPC DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp b/llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
index bfe20c12974..8a18ab9e0e9 100644
--- a/llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
+++ b/llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
@@ -44,7 +44,7 @@ namespace {
bool runOnMachineFunction(MachineFunction &Fn) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "PowerPC QPX Load Splat Simplification";
}
};
diff --git a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp
index 4b55c1ce989..6f9cc314e37 100644
--- a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp
+++ b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp
@@ -43,9 +43,7 @@ namespace {
static char ID;
Filler() : MachineFunctionPass(ID) {}
- const char *getPassName() const override {
- return "SPARC Delay Slot Filler";
- }
+ StringRef getPassName() const override { return "SPARC Delay Slot Filler"; }
bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
bool runOnMachineFunction(MachineFunction &F) override {
diff --git a/llvm/lib/Target/Sparc/LeonPasses.h b/llvm/lib/Target/Sparc/LeonPasses.h
index a544e322fcb..c3ff8690329 100755
--- a/llvm/lib/Target/Sparc/LeonPasses.h
+++ b/llvm/lib/Target/Sparc/LeonPasses.h
@@ -51,7 +51,7 @@ public:
InsertNOPLoad(TargetMachine &tm);
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "InsertNOPLoad: Erratum Fix LBR35: insert a NOP instruction after "
"every single-cycle load instruction when the next instruction is "
"another load/store instruction";
@@ -65,7 +65,7 @@ public:
FixFSMULD(TargetMachine &tm);
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "FixFSMULD: Erratum Fix LBR31: do not select FSMULD";
}
};
@@ -77,7 +77,7 @@ public:
ReplaceFMULS(TargetMachine &tm);
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "ReplaceFMULS: Erratum Fix LBR32: replace FMULS instruction with a "
"routine using conversions/double precision operations to replace "
"FMULS";
@@ -91,7 +91,7 @@ public:
FixAllFDIVSQRT(TargetMachine &tm);
bool runOnMachineFunction(MachineFunction &MF) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "FixAllFDIVSQRT: Erratum Fix LBR34: fix FDIVS/FDIVD/FSQRTS/FSQRTD "
"instructions with NOPs and floating-point store";
}
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index c068440f7c0..d361d858ba1 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -46,9 +46,7 @@ namespace {
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)) {}
- const char *getPassName() const override {
- return "Sparc Assembly Printer";
- }
+ StringRef getPassName() const override { return "Sparc Assembly Printer"; }
void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 07948a33cde..77d44ceba6f 100644
--- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -53,7 +53,7 @@ public:
unsigned ConstraintID,
std::vector<SDValue> &OutOps) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SPARC DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
index 7f6e823729d..fe8c88fe23e 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
@@ -27,9 +27,7 @@ public:
: AsmPrinter(TM, std::move(Streamer)) {}
// Override AsmPrinter.
- const char *getPassName() const override {
- return "SystemZ Assembly Printer";
- }
+ StringRef getPassName() const override { return "SystemZ Assembly Printer"; }
void EmitInstruction(const MachineInstr *MI) override;
void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
diff --git a/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp b/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
index 89edf535fe0..0b5c9dc3bf0 100644
--- a/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
@@ -58,7 +58,7 @@ public:
SystemZElimCompare(const SystemZTargetMachine &tm)
: MachineFunctionPass(ID), TII(nullptr), TRI(nullptr) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SystemZ Comparison Elimination";
}
diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 41ae785054a..154ae474f1d 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -339,7 +339,7 @@ public:
}
// Override MachineFunctionPass.
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SystemZ DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp b/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
index 2cdf2f9bf99..ec8ce6e911f 100644
--- a/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp
@@ -33,7 +33,7 @@ public:
SystemZLDCleanup(const SystemZTargetMachine &tm)
: MachineFunctionPass(ID), TII(nullptr), MF(nullptr) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SystemZ Local Dynamic TLS Access Clean-up";
}
diff --git a/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp b/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
index 98f2124209a..0be0396034c 100644
--- a/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
@@ -133,9 +133,7 @@ public:
SystemZLongBranch(const SystemZTargetMachine &tm)
: MachineFunctionPass(ID), TII(nullptr) {}
- const char *getPassName() const override {
- return "SystemZ Long Branch";
- }
+ StringRef getPassName() const override { return "SystemZ Long Branch"; }
bool runOnMachineFunction(MachineFunction &F) override;
MachineFunctionProperties getRequiredProperties() const override {
diff --git a/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp b/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
index d36f051a1cc..43f01b0b68a 100644
--- a/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
@@ -29,7 +29,7 @@ public:
static char ID;
SystemZShortenInst(const SystemZTargetMachine &tm);
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "SystemZ Instruction Shortening";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
index 0ccc8131715..04951485a71 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
@@ -45,9 +45,7 @@ public:
static char ID; // Pass identification, replacement for typeid
WebAssemblyArgumentMove() : MachineFunctionPass(ID) {}
- const char *getPassName() const override {
- return "WebAssembly Argument Move";
- }
+ StringRef getPassName() const override { return "WebAssembly Argument Move"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
index 78945757ba0..7ab4b8b965c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
@@ -49,7 +49,7 @@ public:
: AsmPrinter(TM, std::move(Streamer)), MRI(nullptr), MFI(nullptr) {}
private:
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Assembly Printer";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
index 65bb738fc43..4d06e608260 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
@@ -43,9 +43,7 @@ using namespace llvm;
namespace {
class WebAssemblyCFGStackify final : public MachineFunctionPass {
- const char *getPassName() const override {
- return "WebAssembly CFG Stackify";
- }
+ StringRef getPassName() const override { return "WebAssembly CFG Stackify"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
index 5dc90920e31..2bbf7a2b42f 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
@@ -47,7 +47,7 @@ using namespace llvm;
namespace {
class WebAssemblyFixIrreducibleControlFlow final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Fix Irreducible Control Flow";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
index 88c38b3602b..a67137f867e 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
@@ -42,7 +42,7 @@ public:
: SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Instruction Selection";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
index af53f3db967..f3bfa5506e4 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp
@@ -29,7 +29,7 @@ using namespace llvm;
namespace {
class WebAssemblyLowerBrUnless final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Lower br_unless";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
index e8c38b4262a..72cb1ccbe66 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
@@ -260,7 +260,7 @@ class WebAssemblyLowerEmscriptenEHSjLj final : public ModulePass {
// Set of whitelisted function names for exception handling
std::set<std::string> EHWhitelistSet;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Lower Emscripten Exceptions";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
index 473de7ddae7..5a3a7411ed4 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
@@ -34,7 +34,7 @@ using namespace llvm;
namespace {
class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Optimize Live Intervals";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
index 4dc401a2c7c..96520aa5d28 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
@@ -24,7 +24,7 @@ using namespace llvm;
namespace {
class OptimizeReturned final : public FunctionPass,
public InstVisitor<OptimizeReturned> {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Optimize Returned";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
index a6670b49783..0120431c639 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
@@ -31,7 +31,7 @@ static cl::opt<bool> DisableWebAssemblyFallthroughReturnOpt(
namespace {
class WebAssemblyPeephole final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly late peephole optimizer";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp
index 7417cded5cc..52fdaf0417a 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp
@@ -40,7 +40,7 @@ public:
WebAssemblyPrepareForLiveIntervals() : MachineFunctionPass(ID) {}
private:
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Prepare For LiveIntervals";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
index dedd9108dfd..5fd4a8d1949 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
@@ -35,7 +35,7 @@ public:
static char ID; // Pass identification, replacement for typeid
WebAssemblyRegColoring() : MachineFunctionPass(ID) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Register Coloring";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
index 5e43804f49c..41e1a6b3129 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
@@ -32,7 +32,7 @@ using namespace llvm;
namespace {
class WebAssemblyRegNumbering final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Register Numbering";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
index 6dae653af59..4591f0f17b7 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
@@ -39,7 +39,7 @@ using namespace llvm;
namespace {
class WebAssemblyRegStackify final : public MachineFunctionPass {
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Register Stackify";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
index 1a83793b0d0..0c64641609b 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
@@ -39,7 +39,7 @@ public:
WebAssemblyReplacePhysRegs() : MachineFunctionPass(ID) {}
private:
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Replace Physical Registers";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp b/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
index 4ebea68c58a..8e0356f12f5 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
@@ -30,7 +30,7 @@ public:
static char ID; // Pass identification, replacement for typeid
WebAssemblySetP2AlignOperands() : MachineFunctionPass(ID) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "WebAssembly Set p2align Operands";
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
index 40b7d665f05..34ec6f2d34a 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp
@@ -46,9 +46,7 @@ public:
static char ID; // Pass identification, replacement for typeid
WebAssemblyStoreResults() : MachineFunctionPass(ID) {}
- const char *getPassName() const override {
- return "WebAssembly Store Results";
- }
+ StringRef getPassName() const override { return "WebAssembly Store Results"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.h b/llvm/lib/Target/X86/X86AsmPrinter.h
index 50acb391f54..b5779b57599 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.h
+++ b/llvm/lib/Target/X86/X86AsmPrinter.h
@@ -101,7 +101,7 @@ public:
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)), SM(*this), FM(*this) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "X86 Assembly / Object Emitter";
}
diff --git a/llvm/lib/Target/X86/X86CallFrameOptimization.cpp b/llvm/lib/Target/X86/X86CallFrameOptimization.cpp
index 176a6d252d3..8912e50d75d 100644
--- a/llvm/lib/Target/X86/X86CallFrameOptimization.cpp
+++ b/llvm/lib/Target/X86/X86CallFrameOptimization.cpp
@@ -100,7 +100,7 @@ private:
const X86RegisterInfo &RegInfo,
DenseSet<unsigned int> &UsedRegs);
- const char *getPassName() const override { return "X86 Optimize Call Frame"; }
+ StringRef getPassName() const override { return "X86 Optimize Call Frame"; }
const TargetInstrInfo *TII;
const X86FrameLowering *TFL;
diff --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
index 8ae214901f3..c945c0297fc 100644
--- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp
+++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
@@ -54,7 +54,7 @@ public:
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "X86 pseudo instruction expansion pass";
}
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
index 05772a806a3..345181cca74 100644
--- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp
+++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
@@ -102,9 +102,7 @@ class FixupBWInstPass : public MachineFunctionPass {
public:
static char ID;
- const char *getPassName() const override {
- return FIXUPBW_DESC;
- }
+ StringRef getPassName() const override { return FIXUPBW_DESC; }
FixupBWInstPass() : MachineFunctionPass(ID) {
initializeFixupBWInstPassPass(*PassRegistry::getPassRegistry());
diff --git a/llvm/lib/Target/X86/X86FixupLEAs.cpp b/llvm/lib/Target/X86/X86FixupLEAs.cpp
index b0ad33619eb..12095917ca3 100644
--- a/llvm/lib/Target/X86/X86FixupLEAs.cpp
+++ b/llvm/lib/Target/X86/X86FixupLEAs.cpp
@@ -40,7 +40,7 @@ class FixupLEAPass : public MachineFunctionPass {
/// where appropriate.
bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
- const char *getPassName() const override { return "X86 LEA Fixup"; }
+ StringRef getPassName() const override { return "X86 LEA Fixup"; }
/// \brief Given a machine register, look for the instruction
/// which writes it in the current basic block. If found,
diff --git a/llvm/lib/Target/X86/X86FixupSetCC.cpp b/llvm/lib/Target/X86/X86FixupSetCC.cpp
index cf3d43132cb..a86eb997635 100644
--- a/llvm/lib/Target/X86/X86FixupSetCC.cpp
+++ b/llvm/lib/Target/X86/X86FixupSetCC.cpp
@@ -39,7 +39,7 @@ class X86FixupSetCCPass : public MachineFunctionPass {
public:
X86FixupSetCCPass() : MachineFunctionPass(ID) {}
- const char *getPassName() const override { return "X86 Fixup SetCC"; }
+ StringRef getPassName() const override { return "X86 Fixup SetCC"; }
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/X86/X86FloatingPoint.cpp b/llvm/lib/Target/X86/X86FloatingPoint.cpp
index fcea6993d97..f0e89590d30 100644
--- a/llvm/lib/Target/X86/X86FloatingPoint.cpp
+++ b/llvm/lib/Target/X86/X86FloatingPoint.cpp
@@ -81,7 +81,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override { return "X86 FP Stackifier"; }
+ StringRef getPassName() const override { return "X86 FP Stackifier"; }
private:
const TargetInstrInfo *TII; // Machine instruction info.
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 5ae74e72ab5..e9d0f67560d 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -165,7 +165,7 @@ namespace {
: SelectionDAGISel(tm, OptLevel), OptForSize(false),
OptForMinSize(false) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "X86 DAG->DAG Instruction Selection";
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index fd3849f95bf..182e1a68a6d 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -8713,7 +8713,7 @@ namespace {
return true;
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "X86 PIC Global Base Reg Initialization";
}
@@ -8827,7 +8827,7 @@ namespace {
return Copy;
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Local Dynamic TLS Access Clean-up";
}
diff --git a/llvm/lib/Target/X86/X86OptimizeLEAs.cpp b/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
index 78827228ca3..943f7530019 100644
--- a/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
+++ b/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
@@ -219,7 +219,7 @@ class OptimizeLEAPass : public MachineFunctionPass {
public:
OptimizeLEAPass() : MachineFunctionPass(ID) {}
- const char *getPassName() const override { return "X86 LEA Optimize"; }
+ StringRef getPassName() const override { return "X86 LEA Optimize"; }
/// \brief Loop over all of the basic blocks, replacing address
/// calculations in load and store instructions, if it's already
diff --git a/llvm/lib/Target/X86/X86PadShortFunction.cpp b/llvm/lib/Target/X86/X86PadShortFunction.cpp
index cd70511b31f..3069d1fd349 100644
--- a/llvm/lib/Target/X86/X86PadShortFunction.cpp
+++ b/llvm/lib/Target/X86/X86PadShortFunction.cpp
@@ -60,7 +60,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "X86 Atom pad short functions";
}
diff --git a/llvm/lib/Target/X86/X86VZeroUpper.cpp b/llvm/lib/Target/X86/X86VZeroUpper.cpp
index df165be63e6..9766b84be65 100644
--- a/llvm/lib/Target/X86/X86VZeroUpper.cpp
+++ b/llvm/lib/Target/X86/X86VZeroUpper.cpp
@@ -42,7 +42,7 @@ namespace {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {return "X86 vzeroupper inserter";}
+ StringRef getPassName() const override { return "X86 vzeroupper inserter"; }
private:
diff --git a/llvm/lib/Target/X86/X86WinAllocaExpander.cpp b/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
index 9f22ca1fd15..fc08f1582ad 100644
--- a/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
+++ b/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
@@ -63,7 +63,7 @@ private:
unsigned SlotSize;
int64_t StackProbeSize;
- const char *getPassName() const override { return "X86 WinAlloca Expander"; }
+ StringRef getPassName() const override { return "X86 WinAlloca Expander"; }
static char ID;
};
diff --git a/llvm/lib/Target/X86/X86WinEHState.cpp b/llvm/lib/Target/X86/X86WinEHState.cpp
index 99387edef99..bc14630584e 100644
--- a/llvm/lib/Target/X86/X86WinEHState.cpp
+++ b/llvm/lib/Target/X86/X86WinEHState.cpp
@@ -57,7 +57,7 @@ public:
void getAnalysisUsage(AnalysisUsage &AU) const override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Windows 32-bit x86 EH state insertion";
}
diff --git a/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp b/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
index 2c23600b00a..62fafd6f79c 100644
--- a/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
+++ b/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
@@ -58,9 +58,7 @@ namespace {
std::unique_ptr<MCStreamer> Streamer)
: AsmPrinter(TM, std::move(Streamer)), MCInstLowering(*this) {}
- const char *getPassName() const override {
- return "XCore Assembly Printer";
- }
+ StringRef getPassName() const override { return "XCore Assembly Printer"; }
void printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O,
const std::string &directive = ".jmptable");
diff --git a/llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp b/llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
index c6e6214d958..4b10e71be03 100644
--- a/llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
+++ b/llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
@@ -32,7 +32,7 @@ namespace {
MachineFunctionProperties::Property::NoVRegs);
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "XCore FRAME_TO_ARGS_OFFSET Elimination";
}
};
diff --git a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
index ce25cbcfd12..086d1d544f6 100644
--- a/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
+++ b/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
@@ -67,7 +67,7 @@ namespace {
bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
std::vector<SDValue> &OutOps) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "XCore DAG->DAG Pattern Instruction Selection";
}
diff --git a/llvm/lib/Transforms/IPO/FunctionImport.cpp b/llvm/lib/Transforms/IPO/FunctionImport.cpp
index 6358e6bd21c..29c54dc9f9c 100644
--- a/llvm/lib/Transforms/IPO/FunctionImport.cpp
+++ b/llvm/lib/Transforms/IPO/FunctionImport.cpp
@@ -814,7 +814,7 @@ public:
static char ID;
/// Specify pass name for debug output
- const char *getPassName() const override { return "Function Importing"; }
+ StringRef getPassName() const override { return "Function Importing"; }
explicit FunctionImportLegacyPass(const ModuleSummaryIndex *Index = nullptr)
: ModulePass(ID), Index(Index) {}
diff --git a/llvm/lib/Transforms/IPO/SampleProfile.cpp b/llvm/lib/Transforms/IPO/SampleProfile.cpp
index dd918965894..6e1818b2f58 100644
--- a/llvm/lib/Transforms/IPO/SampleProfile.cpp
+++ b/llvm/lib/Transforms/IPO/SampleProfile.cpp
@@ -204,7 +204,7 @@ public:
bool doInitialization(Module &M) override {
return SampleLoader.doInitialization(M);
}
- const char *getPassName() const override { return "Sample profile pass"; }
+ StringRef getPassName() const override { return "Sample profile pass"; }
bool runOnModule(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
diff --git a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
index 7db1a434937..5442a099b4a 100644
--- a/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
@@ -482,7 +482,7 @@ struct AddressSanitizer : public FunctionPass {
LocalDynamicShadow(nullptr) {
initializeAddressSanitizerPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "AddressSanitizerFunctionPass";
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
@@ -593,9 +593,9 @@ class AddressSanitizerModule : public ModulePass {
Recover(Recover || ClRecover) {}
bool runOnModule(Module &M) override;
static char ID; // Pass identification, replacement for typeid
- const char *getPassName() const override { return "AddressSanitizerModule"; }
+ StringRef getPassName() const override { return "AddressSanitizerModule"; }
- private:
+private:
void initializeCallbacks(Module &M);
bool InstrumentGlobals(IRBuilder<> &IRB, Module &M);
diff --git a/llvm/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp
index 8895ad4be8b..735728a7d41 100644
--- a/llvm/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/EfficiencySanitizer.cpp
@@ -154,7 +154,7 @@ public:
EfficiencySanitizer(
const EfficiencySanitizerOptions &Opts = EfficiencySanitizerOptions())
: ModulePass(ID), Options(OverrideOptionsFromCL(Opts)) {}
- const char *getPassName() const override;
+ StringRef getPassName() const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnModule(Module &M) override;
static char ID;
@@ -231,7 +231,7 @@ INITIALIZE_PASS_END(
EfficiencySanitizer, "esan",
"EfficiencySanitizer: finds performance issues.", false, false)
-const char *EfficiencySanitizer::getPassName() const {
+StringRef EfficiencySanitizer::getPassName() const {
return "EfficiencySanitizer";
}
diff --git a/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp b/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
index 93a29fde996..56d0f5e983c 100644
--- a/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
+++ b/llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
@@ -142,7 +142,7 @@ public:
: ModulePass(ID), Profiler(Opts) {
initializeGCOVProfilerLegacyPassPass(*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override { return "GCOV Profiler"; }
+ StringRef getPassName() const override { return "GCOV Profiler"; }
bool runOnModule(Module &M) override { return Profiler.runOnModule(M); }
diff --git a/llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp b/llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
index 2e91d21a7a4..1ba13bdfe05 100644
--- a/llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
+++ b/llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
@@ -111,9 +111,7 @@ public:
*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
- return "PGOIndirectCallPromotion";
- }
+ StringRef getPassName() const override { return "PGOIndirectCallPromotion"; }
private:
bool runOnModule(Module &M) override;
diff --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
index 001468a0433..f3345a69fe8 100644
--- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
@@ -53,7 +53,7 @@ public:
InstrProfilingLegacyPass() : ModulePass(ID), InstrProf() {}
InstrProfilingLegacyPass(const InstrProfOptions &Options)
: ModulePass(ID), InstrProf(Options) {}
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "Frontend instrumentation-based coverage lowering";
}
diff --git a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
index 75e15af202c..15ee32c09e4 100644
--- a/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
@@ -316,7 +316,7 @@ class MemorySanitizer : public FunctionPass {
: FunctionPass(ID),
TrackOrigins(std::max(TrackOrigins, (int)ClTrackOrigins)),
WarningFn(nullptr) {}
- const char *getPassName() const override { return "MemorySanitizer"; }
+ StringRef getPassName() const override { return "MemorySanitizer"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<TargetLibraryInfoWrapperPass>();
}
diff --git a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
index 615d9edf3e4..4d6a5048797 100644
--- a/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
+++ b/llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
@@ -202,9 +202,7 @@ public:
*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
- return "PGOInstrumentationGenPass";
- }
+ StringRef getPassName() const override { return "PGOInstrumentationGenPass"; }
private:
bool runOnModule(Module &M) override;
@@ -227,9 +225,7 @@ public:
*PassRegistry::getPassRegistry());
}
- const char *getPassName() const override {
- return "PGOInstrumentationUsePass";
- }
+ StringRef getPassName() const override { return "PGOInstrumentationUsePass"; }
private:
std::string ProfileFileName;
diff --git a/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp b/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
index 774fe2ff059..89106f67d6f 100644
--- a/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
+++ b/llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
@@ -189,7 +189,7 @@ public:
bool runOnModule(Module &M) override;
bool runOnFunction(Function &F);
static char ID; // Pass identification, replacement for typeid
- const char *getPassName() const override { return "SanitizerCoverageModule"; }
+ StringRef getPassName() const override { return "SanitizerCoverageModule"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<DominatorTreeWrapperPass>();
diff --git a/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp b/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
index 6e17f0fe83d..41d0b53672d 100644
--- a/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
@@ -83,7 +83,7 @@ namespace {
/// ThreadSanitizer: instrument the code in module to find races.
struct ThreadSanitizer : public FunctionPass {
ThreadSanitizer() : FunctionPass(ID) {}
- const char *getPassName() const override;
+ StringRef getPassName() const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
bool doInitialization(Module &M) override;
@@ -135,9 +135,7 @@ INITIALIZE_PASS_END(
"ThreadSanitizer: detects data races.",
false, false)
-const char *ThreadSanitizer::getPassName() const {
- return "ThreadSanitizer";
-}
+StringRef ThreadSanitizer::getPassName() const { return "ThreadSanitizer"; }
void ThreadSanitizer::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<TargetLibraryInfoWrapperPass>();
diff --git a/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp b/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
index 913e939c2bd..a94375fe026 100644
--- a/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
@@ -64,7 +64,7 @@ public:
bool runOnFunction(Function &Fn) override;
- const char *getPassName() const override { return "Constant Hoisting"; }
+ StringRef getPassName() const override { return "Constant Hoisting"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
diff --git a/llvm/lib/Transforms/Scalar/LoadCombine.cpp b/llvm/lib/Transforms/Scalar/LoadCombine.cpp
index 427d90c428c..389f1c595aa 100644
--- a/llvm/lib/Transforms/Scalar/LoadCombine.cpp
+++ b/llvm/lib/Transforms/Scalar/LoadCombine.cpp
@@ -68,7 +68,7 @@ public:
AU.addPreserved<GlobalsAAWrapperPass>();
}
- const char *getPassName() const override { return LDCOMBINE_NAME; }
+ StringRef getPassName() const override { return LDCOMBINE_NAME; }
static char ID;
typedef IRBuilder<TargetFolder> BuilderTy;
diff --git a/llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp b/llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
index 0ccf0af7165..3942553ffdf 100644
--- a/llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp
@@ -200,7 +200,7 @@ struct LoopVersioningLICM : public LoopPass {
bool isLoopAlreadyVisited();
void setNoAliasToLoop(Loop *);
bool instructionSafeForVersioning(Instruction *);
- const char *getPassName() const override { return "Loop Versioning"; }
+ StringRef getPassName() const override { return "Loop Versioning"; }
};
}
diff --git a/llvm/lib/Transforms/Scalar/SROA.cpp b/llvm/lib/Transforms/Scalar/SROA.cpp
index b07fc140b49..c834df6c73c 100644
--- a/llvm/lib/Transforms/Scalar/SROA.cpp
+++ b/llvm/lib/Transforms/Scalar/SROA.cpp
@@ -4274,7 +4274,7 @@ public:
AU.setPreservesCFG();
}
- const char *getPassName() const override { return "SROA"; }
+ StringRef getPassName() const override { return "SROA"; }
static char ID;
};
diff --git a/llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp b/llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
index b33ca5cbc99..0b035ba29d4 100644
--- a/llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
+++ b/llvm/lib/Transforms/Scalar/SpeculativeExecution.cpp
@@ -112,7 +112,7 @@ public:
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
if (OnlyIfDivergentTarget)
return "Speculatively execute instructions if target has divergent "
"branches";
diff --git a/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp b/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
index f37ee59618f..7c54f8d4fa7 100644
--- a/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
+++ b/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
@@ -256,9 +256,7 @@ public:
bool runOnRegion(Region *R, RGPassManager &RGM) override;
- const char *getPassName() const override {
- return "Structurize control flow";
- }
+ StringRef getPassName() const override { return "Structurize control flow"; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
if (SkipUniformRegions)
diff --git a/llvm/lib/Transforms/Utils/NameAnonGlobals.cpp b/llvm/lib/Transforms/Utils/NameAnonGlobals.cpp
index c36c1df1fbf..34dc1cccdd5 100644
--- a/llvm/lib/Transforms/Utils/NameAnonGlobals.cpp
+++ b/llvm/lib/Transforms/Utils/NameAnonGlobals.cpp
@@ -91,7 +91,7 @@ public:
static char ID;
/// Specify pass name for debug output
- const char *getPassName() const override { return "Name Anon Globals"; }
+ StringRef getPassName() const override { return "Name Anon Globals"; }
explicit NameAnonGlobalLegacyPass() : ModulePass(ID) {}
diff --git a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
index 4ce8bff559b..6677291ad42 100644
--- a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
@@ -148,7 +148,7 @@ public:
bool runOnFunction(Function &F) override;
- const char *getPassName() const override {
+ StringRef getPassName() const override {
return "GPU Load and Store Vectorizer";
}
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