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-rw-r--r--llvm/lib/Target/AArch64/AArch64.td9
-rw-r--r--llvm/lib/Target/AArch64/AArch64Subtarget.cpp1
-rw-r--r--llvm/lib/Target/AArch64/AArch64Subtarget.h3
3 files changed, 12 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index a447de566ad..954da543d94 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -215,6 +215,14 @@ def ProcKryo : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo",
FeaturePredictableSelectIsExpensive
]>;
+def ProcVulcan : SubtargetFeature<"vulcan", "ARMProcFamily", "Vulcan",
+ "Broadcom Vulcan processors", [
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureCrypto,
+ FeatureCRC,
+ HasV8_1aOps]>;
+
def : ProcessorModel<"generic", NoSchedModel, [
FeatureCRC,
FeatureFPARMv8,
@@ -233,6 +241,7 @@ def : ProcessorModel<"cortex-a73", CortexA57Model, [ProcA57]>;
def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>;
def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>;
+def : ProcessorModel<"vulcan", NoSchedModel, [ProcVulcan]>;
//===----------------------------------------------------------------------===//
// Assembly parser
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
index 3354cbd1a53..68c8dbfaa71 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -71,6 +71,7 @@ void AArch64Subtarget::initializeProperties() {
MaxInterleaveFactor = 4;
VectorInsertExtractBaseCost = 2;
break;
+ case Vulcan: break;
case CortexA35: break;
case CortexA53: break;
case Others: break;
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.h b/llvm/lib/Target/AArch64/AArch64Subtarget.h
index 43d4141aadf..f16daa8b7ca 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -41,7 +41,8 @@ public:
CortexA57,
Cyclone,
ExynosM1,
- Kryo
+ Kryo,
+ Vulcan
};
protected:
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