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-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index dd2d04dbe49..5484ae91855 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -6405,11 +6405,13 @@ static bool hasReassocSibling(const MachineInstr &Inst, bool &Commuted) {
// TODO: There are many more machine instruction opcodes to match:
// 1. Other data types (double, integer, vectors)
-// 2. Other math / logic operations (mul, and, or)
+// 2. Other math / logic operations (and, or)
static bool isAssociativeAndCommutative(unsigned Opcode) {
switch (Opcode) {
- case X86::VADDSSrr:
case X86::ADDSSrr:
+ case X86::VADDSSrr:
+ case X86::MULSSrr:
+ case X86::VMULSSrr:
return true;
default:
return false;
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