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-rw-r--r--llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp6
-rw-r--r--llvm/lib/Target/AArch64/AArch64TargetMachine.cpp6
-rw-r--r--llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp6
-rw-r--r--llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp12
-rw-r--r--llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp8
-rw-r--r--llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h6
-rw-r--r--llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp25
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPU.h4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp6
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp6
-rw-r--r--llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp13
-rw-r--r--llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h4
-rw-r--r--llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp17
-rw-r--r--llvm/lib/Target/ARM/ARMAsmPrinter.cpp8
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp8
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp8
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp8
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp18
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h6
-rw-r--r--llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp34
-rw-r--r--llvm/lib/Target/AVR/AVRAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/AVR/AVRTargetMachine.cpp2
-rw-r--r--llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp2
-rw-r--r--llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp19
-rw-r--r--llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h2
-rw-r--r--llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp10
-rw-r--r--llvm/lib/Target/BPF/BPFAsmPrinter.cpp6
-rw-r--r--llvm/lib/Target/BPF/BPFTargetMachine.cpp6
-rw-r--r--llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp27
-rw-r--r--llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h6
-rw-r--r--llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp26
-rw-r--r--llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp20
-rw-r--r--llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h2
-rw-r--r--llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp8
-rw-r--r--llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp2
-rw-r--r--llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp4
-rw-r--r--llvm/lib/Target/Lanai/Lanai.h2
-rw-r--r--llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/Lanai/LanaiTargetMachine.cpp3
-rw-r--r--llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp23
-rw-r--r--llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h2
-rw-r--r--llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp9
-rw-r--r--llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp11
-rw-r--r--llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h2
-rw-r--r--llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/MSP430/MSP430TargetMachine.cpp2
-rw-r--r--llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp11
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp8
-rw-r--r--llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp14
-rw-r--r--llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp17
-rw-r--r--llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h8
-rw-r--r--llvm/lib/Target/Mips/MipsAsmPrinter.cpp8
-rw-r--r--llvm/lib/Target/Mips/MipsTargetMachine.cpp8
-rw-r--r--llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp31
-rw-r--r--llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp2
-rw-r--r--llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h4
-rw-r--r--llvm/lib/Target/NVPTX/NVPTX.h4
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp4
-rw-r--r--llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp14
-rw-r--r--llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp6
-rw-r--r--llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp6
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp3
-rw-r--r--llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h6
-rw-r--r--llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp9
-rw-r--r--llvm/lib/Target/PowerPC/PPCTargetMachine.cpp6
-rw-r--r--llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp25
-rw-r--r--llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp6
-rw-r--r--llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp10
-rw-r--r--llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp15
-rw-r--r--llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h6
-rw-r--r--llvm/lib/Target/Sparc/SparcAsmPrinter.cpp6
-rw-r--r--llvm/lib/Target/Sparc/SparcTargetMachine.cpp6
-rw-r--r--llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp21
-rw-r--r--llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp16
-rw-r--r--llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp2
-rw-r--r--llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp9
-rw-r--r--llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp4
-rw-r--r--llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp3
-rw-r--r--llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h4
-rw-r--r--llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp8
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp6
-rw-r--r--llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp4
-rw-r--r--llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp4
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp6
-rw-r--r--llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h3
-rw-r--r--llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp17
-rw-r--r--llvm/lib/Target/X86/X86AsmPrinter.cpp4
-rw-r--r--llvm/lib/Target/X86/X86TargetMachine.cpp4
100 files changed, 470 insertions, 331 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
index 3d3a4930619..3c57576c40c 100644
--- a/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+++ b/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
@@ -577,7 +577,7 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeAArch64AsmPrinter() {
- RegisterAsmPrinter<AArch64AsmPrinter> X(TheAArch64leTarget);
- RegisterAsmPrinter<AArch64AsmPrinter> Y(TheAArch64beTarget);
- RegisterAsmPrinter<AArch64AsmPrinter> Z(TheARM64Target);
+ RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget());
+ RegisterAsmPrinter<AArch64AsmPrinter> Y(getTheAArch64beTarget());
+ RegisterAsmPrinter<AArch64AsmPrinter> Z(getTheARM64Target());
}
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index fd209eba81f..6c906b43ebe 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -126,9 +126,9 @@ static cl::opt<bool>
extern "C" void LLVMInitializeAArch64Target() {
// Register the target.
- RegisterTargetMachine<AArch64leTargetMachine> X(TheAArch64leTarget);
- RegisterTargetMachine<AArch64beTargetMachine> Y(TheAArch64beTarget);
- RegisterTargetMachine<AArch64leTargetMachine> Z(TheARM64Target);
+ RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget());
+ RegisterTargetMachine<AArch64beTargetMachine> Y(getTheAArch64beTarget());
+ RegisterTargetMachine<AArch64leTargetMachine> Z(getTheARM64Target());
auto PR = PassRegistry::getPassRegistry();
initializeGlobalISel(*PR);
initializeAArch64A53Fix835769Pass(*PR);
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 9ecee0e2df3..b9207ef0e0f 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4553,9 +4553,9 @@ AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
/// Force static initialization.
extern "C" void LLVMInitializeAArch64AsmParser() {
- RegisterMCAsmParser<AArch64AsmParser> X(TheAArch64leTarget);
- RegisterMCAsmParser<AArch64AsmParser> Y(TheAArch64beTarget);
- RegisterMCAsmParser<AArch64AsmParser> Z(TheARM64Target);
+ RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget());
+ RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget());
+ RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index b97fe1721ea..0d860a7eef7 100644
--- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -237,18 +237,18 @@ createAArch64ExternalSymbolizer(const Triple &TT, LLVMOpInfoCallback GetOpInfo,
}
extern "C" void LLVMInitializeAArch64Disassembler() {
- TargetRegistry::RegisterMCDisassembler(TheAArch64leTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(),
createAArch64Disassembler);
- TargetRegistry::RegisterMCDisassembler(TheAArch64beTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(),
createAArch64Disassembler);
- TargetRegistry::RegisterMCSymbolizer(TheAArch64leTarget,
+ TargetRegistry::RegisterMCSymbolizer(getTheAArch64leTarget(),
createAArch64ExternalSymbolizer);
- TargetRegistry::RegisterMCSymbolizer(TheAArch64beTarget,
+ TargetRegistry::RegisterMCSymbolizer(getTheAArch64beTarget(),
createAArch64ExternalSymbolizer);
- TargetRegistry::RegisterMCDisassembler(TheARM64Target,
+ TargetRegistry::RegisterMCDisassembler(getTheARM64Target(),
createAArch64Disassembler);
- TargetRegistry::RegisterMCSymbolizer(TheARM64Target,
+ TargetRegistry::RegisterMCSymbolizer(getTheARM64Target(),
createAArch64ExternalSymbolizer);
}
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
index dec7e38d63b..e9d38d3dcf1 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
@@ -123,8 +123,8 @@ static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
// Force static initialization.
extern "C" void LLVMInitializeAArch64TargetMC() {
- for (Target *T :
- {&TheAArch64leTarget, &TheAArch64beTarget, &TheARM64Target}) {
+ for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
+ &getTheARM64Target()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
@@ -162,8 +162,8 @@ extern "C" void LLVMInitializeAArch64TargetMC() {
}
// Register the asm backend.
- for (Target *T : {&TheAArch64leTarget, &TheARM64Target})
+ for (Target *T : {&getTheAArch64leTarget(), &getTheARM64Target()})
TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend);
- TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheAArch64beTarget(),
createAArch64beAsmBackend);
}
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
index 2f6c99ffa30..ea2ec2d4b01 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
@@ -35,9 +35,9 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
-extern Target TheAArch64leTarget;
-extern Target TheAArch64beTarget;
-extern Target TheARM64Target;
+Target &getTheAArch64leTarget();
+Target &getTheAArch64beTarget();
+Target &getTheARM64Target();
MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp b/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
index f42ecb1677d..7ac9a5a0848 100644
--- a/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
+++ b/llvm/lib/Target/AArch64/TargetInfo/AArch64TargetInfo.cpp
@@ -10,23 +10,30 @@
#include "llvm/ADT/Triple.h"
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-
namespace llvm {
-Target TheAArch64leTarget;
-Target TheAArch64beTarget;
-Target TheARM64Target;
-} // end namespace llvm
+Target &getTheAArch64leTarget() {
+ static Target TheAArch64leTarget;
+ return TheAArch64leTarget;
+}
+Target &getTheAArch64beTarget() {
+ static Target TheAArch64beTarget;
+ return TheAArch64beTarget;
+}
+Target &getTheARM64Target() {
+ static Target TheARM64Target;
+ return TheARM64Target;
+}
+} // namespace llvm
extern "C" void LLVMInitializeAArch64TargetInfo() {
// Now register the "arm64" name for use with "-march". We don't want it to
// take possession of the Triple::aarch64 tag though.
- TargetRegistry::RegisterTarget(TheARM64Target, "arm64",
+ TargetRegistry::RegisterTarget(getTheARM64Target(), "arm64",
"ARM64 (little endian)",
[](Triple::ArchType) { return false; }, true);
RegisterTarget<Triple::aarch64, /*HasJIT=*/true> Z(
- TheAArch64leTarget, "aarch64", "AArch64 (little endian)");
+ getTheAArch64leTarget(), "aarch64", "AArch64 (little endian)");
RegisterTarget<Triple::aarch64_be, /*HasJIT=*/true> W(
- TheAArch64beTarget, "aarch64_be", "AArch64 (big endian)");
-
+ getTheAArch64beTarget(), "aarch64_be", "AArch64 (big endian)");
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index fd911aed6d2..b4b8dc093e7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -108,8 +108,8 @@ extern char &SIDebuggerInsertNopsID;
void initializeSIInsertWaitsPass(PassRegistry&);
extern char &SIInsertWaitsID;
-extern Target TheAMDGPUTarget;
-extern Target TheGCNTarget;
+Target &getTheAMDGPUTarget();
+Target &getTheGCNTarget();
namespace AMDGPU {
enum TargetIndex {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 7ad34f4db1d..67b11a9054a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -87,8 +87,10 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
}
extern "C" void LLVMInitializeAMDGPUAsmPrinter() {
- TargetRegistry::RegisterAsmPrinter(TheAMDGPUTarget, createAMDGPUAsmPrinterPass);
- TargetRegistry::RegisterAsmPrinter(TheGCNTarget, createAMDGPUAsmPrinterPass);
+ TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(),
+ createAMDGPUAsmPrinterPass);
+ TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(),
+ createAMDGPUAsmPrinterPass);
}
AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index bc436d7ae42..877dacd06f7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -63,8 +63,8 @@ static cl::opt<bool> EnableLoadStoreVectorizer(
extern "C" void LLVMInitializeAMDGPUTarget() {
// Register the target
- RegisterTargetMachine<R600TargetMachine> X(TheAMDGPUTarget);
- RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget);
+ RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
+ RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
PassRegistry *PR = PassRegistry::getPassRegistry();
initializeSILowerI1CopiesPass(*PR);
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index a446de7c933..239d7e963ac 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -3052,8 +3052,8 @@ void AMDGPUAsmParser::cvtSDWA(MCInst &Inst, const OperandVector &Operands,
/// Force static initialization.
extern "C" void LLVMInitializeAMDGPUAsmParser() {
- RegisterMCAsmParser<AMDGPUAsmParser> A(TheAMDGPUTarget);
- RegisterMCAsmParser<AMDGPUAsmParser> B(TheGCNTarget);
+ RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget());
+ RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index 3d90953682c..7db1e24e399 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -495,6 +495,8 @@ static MCDisassembler *createAMDGPUDisassembler(const Target &T,
}
extern "C" void LLVMInitializeAMDGPUDisassembler() {
- TargetRegistry::RegisterMCDisassembler(TheGCNTarget, createAMDGPUDisassembler);
- TargetRegistry::RegisterMCSymbolizer(TheGCNTarget, createAMDGPUSymbolizer);
+ TargetRegistry::RegisterMCDisassembler(getTheGCNTarget(),
+ createAMDGPUDisassembler);
+ TargetRegistry::RegisterMCSymbolizer(getTheGCNTarget(),
+ createAMDGPUSymbolizer);
}
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
index a0d9aab114f..136e6ec4ceb 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
@@ -86,7 +86,7 @@ static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
}
extern "C" void LLVMInitializeAMDGPUTargetMC() {
- for (Target *T : {&TheAMDGPUTarget, &TheGCNTarget}) {
+ for (Target *T : {&getTheAMDGPUTarget(), &getTheGCNTarget()}) {
RegisterMCAsmInfo<AMDGPUMCAsmInfo> X(*T);
TargetRegistry::RegisterMCInstrInfo(*T, createAMDGPUMCInstrInfo);
@@ -98,14 +98,15 @@ extern "C" void LLVMInitializeAMDGPUTargetMC() {
}
// R600 specific registration
- TargetRegistry::RegisterMCCodeEmitter(TheAMDGPUTarget,
+ TargetRegistry::RegisterMCCodeEmitter(getTheAMDGPUTarget(),
createR600MCCodeEmitter);
// GCN specific registration
- TargetRegistry::RegisterMCCodeEmitter(TheGCNTarget, createSIMCCodeEmitter);
+ TargetRegistry::RegisterMCCodeEmitter(getTheGCNTarget(),
+ createSIMCCodeEmitter);
- TargetRegistry::RegisterAsmTargetStreamer(TheGCNTarget,
+ TargetRegistry::RegisterAsmTargetStreamer(getTheGCNTarget(),
createAMDGPUAsmTargetStreamer);
- TargetRegistry::RegisterObjectTargetStreamer(TheGCNTarget,
- createAMDGPUObjectTargetStreamer);
+ TargetRegistry::RegisterObjectTargetStreamer(
+ getTheGCNTarget(), createAMDGPUObjectTargetStreamer);
}
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
index 4915e1ddf72..548bad56e17 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
@@ -32,8 +32,8 @@ class Target;
class Triple;
class raw_pwrite_stream;
-extern Target TheAMDGPUTarget;
-extern Target TheGCNTarget;
+Target &getTheAMDGPUTarget();
+Target &getTheGCNTarget();
MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp b/llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
index 2112135aa5d..9908fc003ce 100644
--- a/llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/TargetInfo/AMDGPUTargetInfo.cpp
@@ -18,13 +18,20 @@ using namespace llvm;
/// \brief The target which suports all AMD GPUs. This will eventually
/// be deprecated and there will be a R600 target and a GCN target.
-Target llvm::TheAMDGPUTarget;
+Target &llvm::getTheAMDGPUTarget() {
+ static Target TheAMDGPUTarget;
+ return TheAMDGPUTarget;
+}
/// \brief The target for GCN GPUs
-Target llvm::TheGCNTarget;
+Target &llvm::getTheGCNTarget() {
+ static Target TheGCNTarget;
+ return TheGCNTarget;
+}
/// \brief Extern function to initialize the targets for the AMDGPU backend
extern "C" void LLVMInitializeAMDGPUTargetInfo() {
- RegisterTarget<Triple::r600, false>
- R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX");
- RegisterTarget<Triple::amdgcn, false> GCN(TheGCNTarget, "amdgcn", "AMD GCN GPUs");
+ RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600",
+ "AMD GPUs HD2XXX-HD6XXX");
+ RegisterTarget<Triple::amdgcn, false> GCN(getTheGCNTarget(), "amdgcn",
+ "AMD GCN GPUs");
}
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index 4facb7fcbdd..bd95c33fc49 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -2064,8 +2064,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeARMAsmPrinter() {
- RegisterAsmPrinter<ARMAsmPrinter> X(TheARMLETarget);
- RegisterAsmPrinter<ARMAsmPrinter> Y(TheARMBETarget);
- RegisterAsmPrinter<ARMAsmPrinter> A(TheThumbLETarget);
- RegisterAsmPrinter<ARMAsmPrinter> B(TheThumbBETarget);
+ RegisterAsmPrinter<ARMAsmPrinter> X(getTheARMLETarget());
+ RegisterAsmPrinter<ARMAsmPrinter> Y(getTheARMBETarget());
+ RegisterAsmPrinter<ARMAsmPrinter> A(getTheThumbLETarget());
+ RegisterAsmPrinter<ARMAsmPrinter> B(getTheThumbBETarget());
}
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 4b24af8a58c..0e74ab0a499 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -51,10 +51,10 @@ EnableGlobalMerge("arm-global-merge", cl::Hidden,
extern "C" void LLVMInitializeARMTarget() {
// Register the target.
- RegisterTargetMachine<ARMLETargetMachine> X(TheARMLETarget);
- RegisterTargetMachine<ARMBETargetMachine> Y(TheARMBETarget);
- RegisterTargetMachine<ThumbLETargetMachine> A(TheThumbLETarget);
- RegisterTargetMachine<ThumbBETargetMachine> B(TheThumbBETarget);
+ RegisterTargetMachine<ARMLETargetMachine> X(getTheARMLETarget());
+ RegisterTargetMachine<ARMBETargetMachine> Y(getTheARMBETarget());
+ RegisterTargetMachine<ThumbLETargetMachine> A(getTheThumbLETarget());
+ RegisterTargetMachine<ThumbBETargetMachine> B(getTheThumbBETarget());
PassRegistry &Registry = *PassRegistry::getPassRegistry();
initializeARMLoadStoreOptPass(Registry);
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 909f939b44f..1160a6c4f96 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -10408,10 +10408,10 @@ bool ARMAsmParser::parseDirectiveThumbSet(SMLoc L) {
/// Force static initialization.
extern "C" void LLVMInitializeARMAsmParser() {
- RegisterMCAsmParser<ARMAsmParser> X(TheARMLETarget);
- RegisterMCAsmParser<ARMAsmParser> Y(TheARMBETarget);
- RegisterMCAsmParser<ARMAsmParser> A(TheThumbLETarget);
- RegisterMCAsmParser<ARMAsmParser> B(TheThumbBETarget);
+ RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget());
+ RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget());
+ RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget());
+ RegisterMCAsmParser<ARMAsmParser> B(getTheThumbBETarget());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 4da28861abd..ac3d8c780af 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -861,13 +861,13 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
extern "C" void LLVMInitializeARMDisassembler() {
- TargetRegistry::RegisterMCDisassembler(TheARMLETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(),
createARMDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheARMBETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(),
createARMDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheThumbLETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheThumbLETarget(),
createThumbDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheThumbBETarget,
+ TargetRegistry::RegisterMCDisassembler(getTheThumbBETarget(),
createThumbDisassembler);
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
index 9e24d1e721b..9e4d202321e 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -274,8 +274,8 @@ static MCInstrAnalysis *createARMMCInstrAnalysis(const MCInstrInfo *Info) {
// Force static initialization.
extern "C" void LLVMInitializeARMTargetMC() {
- for (Target *T : {&TheARMLETarget, &TheARMBETarget, &TheThumbLETarget,
- &TheThumbBETarget}) {
+ for (Target *T : {&getTheARMLETarget(), &getTheARMBETarget(),
+ &getTheThumbLETarget(), &getTheThumbBETarget()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createARMMCAsmInfo);
@@ -314,16 +314,18 @@ extern "C" void LLVMInitializeARMTargetMC() {
}
// Register the MC Code Emitter
- for (Target *T : {&TheARMLETarget, &TheThumbLETarget})
+ for (Target *T : {&getTheARMLETarget(), &getTheThumbLETarget()})
TargetRegistry::RegisterMCCodeEmitter(*T, createARMLEMCCodeEmitter);
- for (Target *T : {&TheARMBETarget, &TheThumbBETarget})
+ for (Target *T : {&getTheARMBETarget(), &getTheThumbBETarget()})
TargetRegistry::RegisterMCCodeEmitter(*T, createARMBEMCCodeEmitter);
// Register the asm backend.
- TargetRegistry::RegisterMCAsmBackend(TheARMLETarget, createARMLEAsmBackend);
- TargetRegistry::RegisterMCAsmBackend(TheARMBETarget, createARMBEAsmBackend);
- TargetRegistry::RegisterMCAsmBackend(TheThumbLETarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheARMLETarget(),
+ createARMLEAsmBackend);
+ TargetRegistry::RegisterMCAsmBackend(getTheARMBETarget(),
+ createARMBEAsmBackend);
+ TargetRegistry::RegisterMCAsmBackend(getTheThumbLETarget(),
createThumbLEAsmBackend);
- TargetRegistry::RegisterMCAsmBackend(TheThumbBETarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheThumbBETarget(),
createThumbBEAsmBackend);
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
index b8a6fab3fe7..ba834201e58 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
@@ -37,8 +37,10 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
-extern Target TheARMLETarget, TheThumbLETarget;
-extern Target TheARMBETarget, TheThumbBETarget;
+Target &getTheARMLETarget();
+Target &getTheThumbLETarget();
+Target &getTheARMBETarget();
+Target &getTheThumbBETarget();
namespace ARM_MC {
std::string ParseARMTriple(const Triple &TT, StringRef CPU);
diff --git a/llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp b/llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
index 3f88eb81806..caa69f8d71b 100644
--- a/llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
+++ b/llvm/lib/Target/ARM/TargetInfo/ARMTargetInfo.cpp
@@ -11,17 +11,31 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheARMLETarget, llvm::TheARMBETarget;
-Target llvm::TheThumbLETarget, llvm::TheThumbBETarget;
+Target &llvm::getTheARMLETarget() {
+ static Target TheARMLETarget;
+ return TheARMLETarget;
+}
+Target &llvm::getTheARMBETarget() {
+ static Target TheARMBETarget;
+ return TheARMBETarget;
+}
+Target &llvm::getTheThumbLETarget() {
+ static Target TheThumbLETarget;
+ return TheThumbLETarget;
+}
+Target &llvm::getTheThumbBETarget() {
+ static Target TheThumbBETarget;
+ return TheThumbBETarget;
+}
extern "C" void LLVMInitializeARMTargetInfo() {
- RegisterTarget<Triple::arm, /*HasJIT=*/true>
- X(TheARMLETarget, "arm", "ARM");
- RegisterTarget<Triple::armeb, /*HasJIT=*/true>
- Y(TheARMBETarget, "armeb", "ARM (big endian)");
+ RegisterTarget<Triple::arm, /*HasJIT=*/true> X(getTheARMLETarget(), "arm",
+ "ARM");
+ RegisterTarget<Triple::armeb, /*HasJIT=*/true> Y(getTheARMBETarget(), "armeb",
+ "ARM (big endian)");
- RegisterTarget<Triple::thumb, /*HasJIT=*/true>
- A(TheThumbLETarget, "thumb", "Thumb");
- RegisterTarget<Triple::thumbeb, /*HasJIT=*/true>
- B(TheThumbBETarget, "thumbeb", "Thumb (big endian)");
+ RegisterTarget<Triple::thumb, /*HasJIT=*/true> A(getTheThumbLETarget(),
+ "thumb", "Thumb");
+ RegisterTarget<Triple::thumbeb, /*HasJIT=*/true> B(
+ getTheThumbBETarget(), "thumbeb", "Thumb (big endian)");
}
diff --git a/llvm/lib/Target/AVR/AVRAsmPrinter.cpp b/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
index 3ac88a1d420..90ff6e31f8f 100644
--- a/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
+++ b/llvm/lib/Target/AVR/AVRAsmPrinter.cpp
@@ -177,6 +177,6 @@ void AVRAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} // end of namespace llvm
extern "C" void LLVMInitializeAVRAsmPrinter() {
- llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::TheAVRTarget);
+ llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
}
diff --git a/llvm/lib/Target/AVR/AVRTargetMachine.cpp b/llvm/lib/Target/AVR/AVRTargetMachine.cpp
index b613c3a2f70..f630a5ddccb 100644
--- a/llvm/lib/Target/AVR/AVRTargetMachine.cpp
+++ b/llvm/lib/Target/AVR/AVRTargetMachine.cpp
@@ -77,7 +77,7 @@ TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
extern "C" void LLVMInitializeAVRTarget() {
// Register the target.
- RegisterTargetMachine<AVRTargetMachine> X(TheAVRTarget);
+ RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());
}
const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
diff --git a/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp b/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
index 4aeac446db2..f34ba756aa7 100644
--- a/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
+++ b/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
@@ -582,7 +582,7 @@ bool AVRAsmParser::ParseInstruction(ParseInstructionInfo &Info,
bool AVRAsmParser::ParseDirective(llvm::AsmToken DirectiveID) { return true; }
extern "C" void LLVMInitializeAVRAsmParser() {
- RegisterMCAsmParser<AVRAsmParser> X(TheAVRTarget);
+ RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
index 96736c2aa22..77d56c85800 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
@@ -85,33 +85,34 @@ static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
extern "C" void LLVMInitializeAVRTargetMC() {
// Register the MC asm info.
- RegisterMCAsmInfo<AVRMCAsmInfo> X(TheAVRTarget);
+ RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget());
// Register the MC instruction info.
- TargetRegistry::RegisterMCInstrInfo(TheAVRTarget, createAVRMCInstrInfo);
+ TargetRegistry::RegisterMCInstrInfo(getTheAVRTarget(), createAVRMCInstrInfo);
// Register the MC register info.
- TargetRegistry::RegisterMCRegInfo(TheAVRTarget, createAVRMCRegisterInfo);
+ TargetRegistry::RegisterMCRegInfo(getTheAVRTarget(), createAVRMCRegisterInfo);
// Register the MC subtarget info.
- TargetRegistry::RegisterMCSubtargetInfo(TheAVRTarget,
+ TargetRegistry::RegisterMCSubtargetInfo(getTheAVRTarget(),
createAVRMCSubtargetInfo);
// Register the MCInstPrinter.
- TargetRegistry::RegisterMCInstPrinter(TheAVRTarget, createAVRMCInstPrinter);
+ TargetRegistry::RegisterMCInstPrinter(getTheAVRTarget(),
+ createAVRMCInstPrinter);
// Register the ELF streamer
- TargetRegistry::RegisterELFStreamer(TheAVRTarget, createMCStreamer);
+ TargetRegistry::RegisterELFStreamer(getTheAVRTarget(), createMCStreamer);
// Register the obj target streamer.
- TargetRegistry::RegisterObjectTargetStreamer(TheAVRTarget,
+ TargetRegistry::RegisterObjectTargetStreamer(getTheAVRTarget(),
createAVRObjectTargetStreamer);
// Register the asm target streamer.
- TargetRegistry::RegisterAsmTargetStreamer(TheAVRTarget,
+ TargetRegistry::RegisterAsmTargetStreamer(getTheAVRTarget(),
createMCAsmTargetStreamer);
// Register the asm backend (as little endian).
- TargetRegistry::RegisterMCAsmBackend(TheAVRTarget, createAVRAsmBackend);
+ TargetRegistry::RegisterMCAsmBackend(getTheAVRTarget(), createAVRAsmBackend);
}
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
index 88218d3f418..41a57476791 100644
--- a/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
+++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
@@ -30,7 +30,7 @@ class Target;
class Triple;
class raw_pwrite_stream;
-extern Target TheAVRTarget;
+Target &getTheAVRTarget();
/// Creates a machine code emitter for AVR.
MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
diff --git a/llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp b/llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
index 0dffdf4c289..36cecaa7ac7 100644
--- a/llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
+++ b/llvm/lib/Target/AVR/TargetInfo/AVRTargetInfo.cpp
@@ -9,13 +9,15 @@
#include "llvm/IR/Module.h"
#include "llvm/Support/TargetRegistry.h"
-
namespace llvm {
-Target TheAVRTarget;
+Target &getTheAVRTarget() {
+ static Target TheAVRTarget;
+ return TheAVRTarget;
+}
}
extern "C" void LLVMInitializeAVRTargetInfo() {
- llvm::RegisterTarget<llvm::Triple::avr> X(
- llvm::TheAVRTarget, "avr", "Atmel AVR Microcontroller");
+ llvm::RegisterTarget<llvm::Triple::avr> X(llvm::getTheAVRTarget(), "avr",
+ "Atmel AVR Microcontroller");
}
diff --git a/llvm/lib/Target/BPF/BPFAsmPrinter.cpp b/llvm/lib/Target/BPF/BPFAsmPrinter.cpp
index 19bac645799..c5201465e07 100644
--- a/llvm/lib/Target/BPF/BPFAsmPrinter.cpp
+++ b/llvm/lib/Target/BPF/BPFAsmPrinter.cpp
@@ -55,7 +55,7 @@ void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeBPFAsmPrinter() {
- RegisterAsmPrinter<BPFAsmPrinter> X(TheBPFleTarget);
- RegisterAsmPrinter<BPFAsmPrinter> Y(TheBPFbeTarget);
- RegisterAsmPrinter<BPFAsmPrinter> Z(TheBPFTarget);
+ RegisterAsmPrinter<BPFAsmPrinter> X(getTheBPFleTarget());
+ RegisterAsmPrinter<BPFAsmPrinter> Y(getTheBPFbeTarget());
+ RegisterAsmPrinter<BPFAsmPrinter> Z(getTheBPFTarget());
}
diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
index 5fc6f2f0ce5..897695633e4 100644
--- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp
+++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp
@@ -24,9 +24,9 @@ using namespace llvm;
extern "C" void LLVMInitializeBPFTarget() {
// Register the target.
- RegisterTargetMachine<BPFTargetMachine> X(TheBPFleTarget);
- RegisterTargetMachine<BPFTargetMachine> Y(TheBPFbeTarget);
- RegisterTargetMachine<BPFTargetMachine> Z(TheBPFTarget);
+ RegisterTargetMachine<BPFTargetMachine> X(getTheBPFleTarget());
+ RegisterTargetMachine<BPFTargetMachine> Y(getTheBPFbeTarget());
+ RegisterTargetMachine<BPFTargetMachine> Z(getTheBPFTarget());
}
// DataLayout: little or big endian
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
index 03d6b193fe2..55415f97396 100644
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
@@ -68,7 +68,8 @@ static MCInstPrinter *createBPFMCInstPrinter(const Triple &T,
}
extern "C" void LLVMInitializeBPFTargetMC() {
- for (Target *T : {&TheBPFleTarget, &TheBPFbeTarget, &TheBPFTarget}) {
+ for (Target *T :
+ {&getTheBPFleTarget(), &getTheBPFbeTarget(), &getTheBPFTarget()}) {
// Register the MC asm info.
RegisterMCAsmInfo<BPFMCAsmInfo> X(*T);
@@ -90,18 +91,26 @@ extern "C" void LLVMInitializeBPFTargetMC() {
}
// Register the MC code emitter
- TargetRegistry::RegisterMCCodeEmitter(TheBPFleTarget, createBPFMCCodeEmitter);
- TargetRegistry::RegisterMCCodeEmitter(TheBPFbeTarget, createBPFbeMCCodeEmitter);
+ TargetRegistry::RegisterMCCodeEmitter(getTheBPFleTarget(),
+ createBPFMCCodeEmitter);
+ TargetRegistry::RegisterMCCodeEmitter(getTheBPFbeTarget(),
+ createBPFbeMCCodeEmitter);
// Register the ASM Backend
- TargetRegistry::RegisterMCAsmBackend(TheBPFleTarget, createBPFAsmBackend);
- TargetRegistry::RegisterMCAsmBackend(TheBPFbeTarget, createBPFbeAsmBackend);
+ TargetRegistry::RegisterMCAsmBackend(getTheBPFleTarget(),
+ createBPFAsmBackend);
+ TargetRegistry::RegisterMCAsmBackend(getTheBPFbeTarget(),
+ createBPFbeAsmBackend);
if (sys::IsLittleEndianHost) {
- TargetRegistry::RegisterMCCodeEmitter(TheBPFTarget, createBPFMCCodeEmitter);
- TargetRegistry::RegisterMCAsmBackend(TheBPFTarget, createBPFAsmBackend);
+ TargetRegistry::RegisterMCCodeEmitter(getTheBPFTarget(),
+ createBPFMCCodeEmitter);
+ TargetRegistry::RegisterMCAsmBackend(getTheBPFTarget(),
+ createBPFAsmBackend);
} else {
- TargetRegistry::RegisterMCCodeEmitter(TheBPFTarget, createBPFbeMCCodeEmitter);
- TargetRegistry::RegisterMCAsmBackend(TheBPFTarget, createBPFbeAsmBackend);
+ TargetRegistry::RegisterMCCodeEmitter(getTheBPFTarget(),
+ createBPFbeMCCodeEmitter);
+ TargetRegistry::RegisterMCAsmBackend(getTheBPFTarget(),
+ createBPFbeAsmBackend);
}
}
diff --git a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h
index 74765071e55..3df673eaeb4 100644
--- a/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h
+++ b/llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h
@@ -32,9 +32,9 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
-extern Target TheBPFleTarget;
-extern Target TheBPFbeTarget;
-extern Target TheBPFTarget;
+Target &getTheBPFleTarget();
+Target &getTheBPFbeTarget();
+Target &getTheBPFTarget();
MCCodeEmitter *createBPFMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp b/llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
index a16dbae867b..265180b9987 100644
--- a/llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
+++ b/llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
@@ -12,17 +12,25 @@
using namespace llvm;
namespace llvm {
-Target TheBPFleTarget;
-Target TheBPFbeTarget;
-Target TheBPFTarget;
+Target &getTheBPFleTarget() {
+ static Target TheBPFleTarget;
+ return TheBPFleTarget;
}
+Target &getTheBPFbeTarget() {
+ static Target TheBPFbeTarget;
+ return TheBPFbeTarget;
+}
+Target &getTheBPFTarget() {
+ static Target TheBPFTarget;
+ return TheBPFTarget;
+}
+} // namespace llvm
extern "C" void LLVMInitializeBPFTargetInfo() {
- TargetRegistry::RegisterTarget(TheBPFTarget, "bpf",
- "BPF (host endian)",
+ TargetRegistry::RegisterTarget(getTheBPFTarget(), "bpf", "BPF (host endian)",
[](Triple::ArchType) { return false; }, true);
- RegisterTarget<Triple::bpfel, /*HasJIT=*/true> X(
- TheBPFleTarget, "bpfel", "BPF (little endian)");
- RegisterTarget<Triple::bpfeb, /*HasJIT=*/true> Y(
- TheBPFbeTarget, "bpfeb", "BPF (big endian)");
+ RegisterTarget<Triple::bpfel, /*HasJIT=*/true> X(getTheBPFleTarget(), "bpfel",
+ "BPF (little endian)");
+ RegisterTarget<Triple::bpfeb, /*HasJIT=*/true> Y(getTheBPFbeTarget(), "bpfeb",
+ "BPF (big endian)");
}
diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
index b97707e59c6..1d17e90aba4 100644
--- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
@@ -1065,7 +1065,7 @@ bool HexagonAsmParser::RegisterMatchesArch(unsigned MatchNum) const {
/// Force static initialization.
extern "C" void LLVMInitializeHexagonAsmParser() {
- RegisterMCAsmParser<HexagonAsmParser> X(TheHexagonTarget);
+ RegisterMCAsmParser<HexagonAsmParser> X(getTheHexagonTarget());
}
#define GET_MATCHER_IMPLEMENTATION
diff --git a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
index 507e0ca8eff..c1aa02d828c 100644
--- a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
+++ b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
@@ -147,7 +147,7 @@ static MCDisassembler *createHexagonDisassembler(const Target &T,
}
extern "C" void LLVMInitializeHexagonDisassembler() {
- TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheHexagonTarget(),
createHexagonDisassembler);
}
diff --git a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
index 9e0bfa675ab..7219977eebe 100644
--- a/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
@@ -600,5 +600,5 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
extern "C" void LLVMInitializeHexagonAsmPrinter() {
- RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);
+ RegisterAsmPrinter<HexagonAsmPrinter> X(getTheHexagonTarget());
}
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
index 1061082865c..132d12a66d4 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -100,7 +100,7 @@ int HexagonTargetMachineModule = 0;
extern "C" void LLVMInitializeHexagonTarget() {
// Register the target.
- RegisterTargetMachine<HexagonTargetMachine> X(TheHexagonTarget);
+ RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());
}
static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) {
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
index f06a1337eb4..da41dad445f 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
@@ -230,39 +230,39 @@ createHexagonObjectTargetStreamer(MCStreamer &S, MCSubtargetInfo const &STI) {
// Force static initialization.
extern "C" void LLVMInitializeHexagonTargetMC() {
// Register the MC asm info.
- RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
+ RegisterMCAsmInfoFn X(getTheHexagonTarget(), createHexagonMCAsmInfo);
// Register the MC instruction info.
- TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget,
+ TargetRegistry::RegisterMCInstrInfo(getTheHexagonTarget(),
createHexagonMCInstrInfo);
// Register the MC register info.
- TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
+ TargetRegistry::RegisterMCRegInfo(getTheHexagonTarget(),
createHexagonMCRegisterInfo);
// Register the MC subtarget info.
- TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
+ TargetRegistry::RegisterMCSubtargetInfo(getTheHexagonTarget(),
createHexagonMCSubtargetInfo);
// Register the MC Code Emitter
- TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
+ TargetRegistry::RegisterMCCodeEmitter(getTheHexagonTarget(),
createHexagonMCCodeEmitter);
// Register the asm backend
- TargetRegistry::RegisterMCAsmBackend(TheHexagonTarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheHexagonTarget(),
createHexagonAsmBackend);
// Register the obj streamer
- TargetRegistry::RegisterELFStreamer(TheHexagonTarget, createMCStreamer);
+ TargetRegistry::RegisterELFStreamer(getTheHexagonTarget(), createMCStreamer);
// Register the asm streamer
- TargetRegistry::RegisterAsmTargetStreamer(TheHexagonTarget,
+ TargetRegistry::RegisterAsmTargetStreamer(getTheHexagonTarget(),
createMCAsmTargetStreamer);
// Register the MC Inst Printer
- TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
+ TargetRegistry::RegisterMCInstPrinter(getTheHexagonTarget(),
createHexagonMCInstPrinter);
TargetRegistry::RegisterObjectTargetStreamer(
- TheHexagonTarget, createHexagonObjectTargetStreamer);
+ getTheHexagonTarget(), createHexagonObjectTargetStreamer);
}
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
index 27a60aa6b22..5f8c346ea80 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
@@ -35,7 +35,7 @@ class StringRef;
class raw_ostream;
class raw_pwrite_stream;
-extern Target TheHexagonTarget;
+Target &getTheHexagonTarget();
extern cl::opt<bool> HexagonDisableCompound;
extern cl::opt<bool> HexagonDisableDuplex;
extern const InstrStage HexagonStages[];
diff --git a/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp b/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
index 40f6c8d23ea..0554646bb6b 100644
--- a/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
+++ b/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
@@ -12,8 +12,12 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheHexagonTarget;
+Target &llvm::getTheHexagonTarget() {
+ static Target TheHexagonTarget;
+ return TheHexagonTarget;
+}
extern "C" void LLVMInitializeHexagonTargetInfo() {
- RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(TheHexagonTarget, "hexagon", "Hexagon");
+ RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(getTheHexagonTarget(),
+ "hexagon", "Hexagon");
}
diff --git a/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp b/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
index bad187cf047..25e58692406 100644
--- a/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
+++ b/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
@@ -1207,7 +1207,7 @@ bool LanaiAsmParser::ParseInstruction(ParseInstructionInfo & /*Info*/,
} // namespace
extern "C" void LLVMInitializeLanaiAsmParser() {
- RegisterMCAsmParser<LanaiAsmParser> x(TheLanaiTarget);
+ RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget());
}
} // namespace llvm
diff --git a/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp b/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
index 744441bc90d..c93ac60e896 100644
--- a/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
+++ b/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
@@ -27,7 +27,7 @@ using namespace llvm;
typedef MCDisassembler::DecodeStatus DecodeStatus;
namespace llvm {
-extern Target TheLanaiTarget;
+Target &getTheLanaiTarget();
}
static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
@@ -38,7 +38,7 @@ static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
extern "C" void LLVMInitializeLanaiDisassembler() {
// Register the disassembler
- TargetRegistry::RegisterMCDisassembler(TheLanaiTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheLanaiTarget(),
createLanaiDisassembler);
}
diff --git a/llvm/lib/Target/Lanai/Lanai.h b/llvm/lib/Target/Lanai/Lanai.h
index 47bd498c579..c1fdf793305 100644
--- a/llvm/lib/Target/Lanai/Lanai.h
+++ b/llvm/lib/Target/Lanai/Lanai.h
@@ -45,7 +45,7 @@ FunctionPass *createLanaiMemAluCombinerPass();
// operations.
FunctionPass *createLanaiSetflagAluCombinerPass();
-extern Target TheLanaiTarget;
+Target &getTheLanaiTarget();
} // namespace llvm
#endif // LLVM_LIB_TARGET_LANAI_LANAI_H
diff --git a/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp b/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
index 97f2e99a429..607b2a97b29 100644
--- a/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
+++ b/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
@@ -239,5 +239,5 @@ bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
// Force static initialization.
extern "C" void LLVMInitializeLanaiAsmPrinter() {
- RegisterAsmPrinter<LanaiAsmPrinter> X(TheLanaiTarget);
+ RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
}
diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
index b1f4b496eb9..2a9bc25d7fa 100644
--- a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
+++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
@@ -32,7 +32,8 @@ void initializeLanaiMemAluCombinerPass(PassRegistry &);
extern "C" void LLVMInitializeLanaiTarget() {
// Register the target.
- RegisterTargetMachine<LanaiTargetMachine> registered_target(TheLanaiTarget);
+ RegisterTargetMachine<LanaiTargetMachine> registered_target(
+ getTheLanaiTarget());
}
static std::string computeDataLayout() {
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
index 04bedfb7fba..f53bfed7fa6 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
@@ -113,37 +113,40 @@ static MCInstrAnalysis *createLanaiInstrAnalysis(const MCInstrInfo *Info) {
extern "C" void LLVMInitializeLanaiTargetMC() {
// Register the MC asm info.
- RegisterMCAsmInfo<LanaiMCAsmInfo> X(TheLanaiTarget);
+ RegisterMCAsmInfo<LanaiMCAsmInfo> X(getTheLanaiTarget());
// Register the MC instruction info.
- TargetRegistry::RegisterMCInstrInfo(TheLanaiTarget, createLanaiMCInstrInfo);
+ TargetRegistry::RegisterMCInstrInfo(getTheLanaiTarget(),
+ createLanaiMCInstrInfo);
// Register the MC register info.
- TargetRegistry::RegisterMCRegInfo(TheLanaiTarget, createLanaiMCRegisterInfo);
+ TargetRegistry::RegisterMCRegInfo(getTheLanaiTarget(),
+ createLanaiMCRegisterInfo);
// Register the MC subtarget info.
- TargetRegistry::RegisterMCSubtargetInfo(TheLanaiTarget,
+ TargetRegistry::RegisterMCSubtargetInfo(getTheLanaiTarget(),
createLanaiMCSubtargetInfo);
// Register the MC code emitter
- TargetRegistry::RegisterMCCodeEmitter(TheLanaiTarget,
+ TargetRegistry::RegisterMCCodeEmitter(getTheLanaiTarget(),
llvm::createLanaiMCCodeEmitter);
// Register the ASM Backend
- TargetRegistry::RegisterMCAsmBackend(TheLanaiTarget, createLanaiAsmBackend);
+ TargetRegistry::RegisterMCAsmBackend(getTheLanaiTarget(),
+ createLanaiAsmBackend);
// Register the MCInstPrinter.
- TargetRegistry::RegisterMCInstPrinter(TheLanaiTarget,
+ TargetRegistry::RegisterMCInstPrinter(getTheLanaiTarget(),
createLanaiMCInstPrinter);
// Register the ELF streamer.
- TargetRegistry::RegisterELFStreamer(TheLanaiTarget, createMCStreamer);
+ TargetRegistry::RegisterELFStreamer(getTheLanaiTarget(), createMCStreamer);
// Register the MC relocation info.
- TargetRegistry::RegisterMCRelocationInfo(TheLanaiTarget,
+ TargetRegistry::RegisterMCRelocationInfo(getTheLanaiTarget(),
createLanaiElfRelocation);
// Register the MC instruction analyzer.
- TargetRegistry::RegisterMCInstrAnalysis(TheLanaiTarget,
+ TargetRegistry::RegisterMCInstrAnalysis(getTheLanaiTarget(),
createLanaiInstrAnalysis);
}
diff --git a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h
index 4f8ba14e2eb..8adaf4cea42 100644
--- a/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h
+++ b/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h
@@ -32,7 +32,7 @@ class Triple;
class StringRef;
class raw_pwrite_stream;
-extern Target TheLanaiTarget;
+Target &getTheLanaiTarget();
MCCodeEmitter *createLanaiMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp b/llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
index bd615d6ad3a..e377db1d49d 100644
--- a/llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
+++ b/llvm/lib/Target/Lanai/TargetInfo/LanaiTargetInfo.cpp
@@ -13,8 +13,13 @@
using namespace llvm;
-Target llvm::TheLanaiTarget;
+namespace llvm {
+Target &getTheLanaiTarget() {
+ static Target TheLanaiTarget;
+ return TheLanaiTarget;
+}
+} // namespace llvm
extern "C" void LLVMInitializeLanaiTargetInfo() {
- RegisterTarget<Triple::lanai> X(TheLanaiTarget, "lanai", "Lanai");
+ RegisterTarget<Triple::lanai> X(getTheLanaiTarget(), "lanai", "Lanai");
}
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
index b3631caca95..8c715500f38 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
@@ -59,20 +59,21 @@ static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T,
extern "C" void LLVMInitializeMSP430TargetMC() {
// Register the MC asm info.
- RegisterMCAsmInfo<MSP430MCAsmInfo> X(TheMSP430Target);
+ RegisterMCAsmInfo<MSP430MCAsmInfo> X(getTheMSP430Target());
// Register the MC instruction info.
- TargetRegistry::RegisterMCInstrInfo(TheMSP430Target, createMSP430MCInstrInfo);
+ TargetRegistry::RegisterMCInstrInfo(getTheMSP430Target(),
+ createMSP430MCInstrInfo);
// Register the MC register info.
- TargetRegistry::RegisterMCRegInfo(TheMSP430Target,
+ TargetRegistry::RegisterMCRegInfo(getTheMSP430Target(),
createMSP430MCRegisterInfo);
// Register the MC subtarget info.
- TargetRegistry::RegisterMCSubtargetInfo(TheMSP430Target,
+ TargetRegistry::RegisterMCSubtargetInfo(getTheMSP430Target(),
createMSP430MCSubtargetInfo);
// Register the MCInstPrinter.
- TargetRegistry::RegisterMCInstPrinter(TheMSP430Target,
+ TargetRegistry::RegisterMCInstPrinter(getTheMSP430Target(),
createMSP430MCInstPrinter);
}
diff --git a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h
index 241f1d6f9c0..b901c5f0979 100644
--- a/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h
+++ b/llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h
@@ -19,7 +19,7 @@
namespace llvm {
class Target;
-extern Target TheMSP430Target;
+Target &getTheMSP430Target();
} // End llvm namespace
diff --git a/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp b/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
index fe1ce7bb8bd..abf062fe86a 100644
--- a/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
+++ b/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
@@ -155,5 +155,5 @@ void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
// Force static initialization.
extern "C" void LLVMInitializeMSP430AsmPrinter() {
- RegisterAsmPrinter<MSP430AsmPrinter> X(TheMSP430Target);
+ RegisterAsmPrinter<MSP430AsmPrinter> X(getTheMSP430Target());
}
diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
index b2e698ca554..bebe5fa35ad 100644
--- a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
+++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
@@ -23,7 +23,7 @@ using namespace llvm;
extern "C" void LLVMInitializeMSP430Target() {
// Register the target.
- RegisterTargetMachine<MSP430TargetMachine> X(TheMSP430Target);
+ RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
}
static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
diff --git a/llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp b/llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
index 0d71d04ebe2..62f52a19367 100644
--- a/llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
+++ b/llvm/lib/Target/MSP430/TargetInfo/MSP430TargetInfo.cpp
@@ -12,9 +12,12 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheMSP430Target;
+Target &llvm::getTheMSP430Target() {
+ static Target TheMSP430Target;
+ return TheMSP430Target;
+}
-extern "C" void LLVMInitializeMSP430TargetInfo() {
- RegisterTarget<Triple::msp430>
- X(TheMSP430Target, "msp430", "MSP430 [experimental]");
+extern "C" void LLVMInitializeMSP430TargetInfo() {
+ RegisterTarget<Triple::msp430> X(getTheMSP430Target(), "msp430",
+ "MSP430 [experimental]");
}
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 890dc2d6cba..34250885508 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -6469,10 +6469,10 @@ bool MipsAsmParser::parseInternalDirectiveReallowModule() {
}
extern "C" void LLVMInitializeMipsAsmParser() {
- RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
- RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
- RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
- RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);
+ RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget());
+ RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget());
+ RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target());
+ RegisterMCAsmParser<MipsAsmParser> B(getTheMips64elTarget());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
index 74a8f4f2152..b992988aefd 100644
--- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
+++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
@@ -519,8 +519,10 @@ static DecodeStatus DecodeMovePRegPair(MCInst &Inst, unsigned Insn,
const void *Decoder);
namespace llvm {
-extern Target TheMipselTarget, TheMipsTarget, TheMips64Target,
- TheMips64elTarget;
+Target &getTheMipselTarget();
+Target &getTheMipsTarget();
+Target &getTheMips64Target();
+Target &getTheMips64elTarget();
}
static MCDisassembler *createMipsDisassembler(
@@ -539,13 +541,13 @@ static MCDisassembler *createMipselDisassembler(
extern "C" void LLVMInitializeMipsDisassembler() {
// Register the disassembler.
- TargetRegistry::RegisterMCDisassembler(TheMipsTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheMipsTarget(),
createMipsDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheMipselTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheMipselTarget(),
createMipselDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheMips64Target,
+ TargetRegistry::RegisterMCDisassembler(getTheMips64Target(),
createMipsDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheMips64elTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheMips64elTarget(),
createMipselDisassembler);
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
index a0557395097..56fe1857211 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
@@ -149,8 +149,8 @@ static MCInstrAnalysis *createMipsMCInstrAnalysis(const MCInstrInfo *Info) {
}
extern "C" void LLVMInitializeMipsTargetMC() {
- for (Target *T : {&TheMipsTarget, &TheMipselTarget, &TheMips64Target,
- &TheMips64elTarget}) {
+ for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(),
+ &getTheMips64Target(), &getTheMips64elTarget()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createMipsMCAsmInfo);
@@ -183,20 +183,19 @@ extern "C" void LLVMInitializeMipsTargetMC() {
}
// Register the MC Code Emitter
- for (Target *T : {&TheMipsTarget, &TheMips64Target})
+ for (Target *T : {&getTheMipsTarget(), &getTheMips64Target()})
TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEB);
- for (Target *T : {&TheMipselTarget, &TheMips64elTarget})
+ for (Target *T : {&getTheMipselTarget(), &getTheMips64elTarget()})
TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEL);
// Register the asm backend.
- TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheMipsTarget(),
createMipsAsmBackendEB32);
- TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheMipselTarget(),
createMipsAsmBackendEL32);
- TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
+ TargetRegistry::RegisterMCAsmBackend(getTheMips64Target(),
createMipsAsmBackendEB64);
- TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheMips64elTarget(),
createMipsAsmBackendEL64);
-
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
index 0458c644a17..b28681f42eb 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
@@ -31,10 +31,10 @@ class Triple;
class raw_ostream;
class raw_pwrite_stream;
-extern Target TheMipsTarget;
-extern Target TheMipselTarget;
-extern Target TheMips64Target;
-extern Target TheMips64elTarget;
+Target &getTheMipsTarget();
+Target &getTheMipselTarget();
+Target &getTheMips64Target();
+Target &getTheMips64elTarget();
MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
index 8dab262ac25..b30fc4a0119 100644
--- a/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -1066,8 +1066,8 @@ bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
// Force static initialization.
extern "C" void LLVMInitializeMipsAsmPrinter() {
- RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
- RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);
- RegisterAsmPrinter<MipsAsmPrinter> A(TheMips64Target);
- RegisterAsmPrinter<MipsAsmPrinter> B(TheMips64elTarget);
+ RegisterAsmPrinter<MipsAsmPrinter> X(getTheMipsTarget());
+ RegisterAsmPrinter<MipsAsmPrinter> Y(getTheMipselTarget());
+ RegisterAsmPrinter<MipsAsmPrinter> A(getTheMips64Target());
+ RegisterAsmPrinter<MipsAsmPrinter> B(getTheMips64elTarget());
}
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 80641ed9bd3..594bcec6eea 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -39,10 +39,10 @@ using namespace llvm;
extern "C" void LLVMInitializeMipsTarget() {
// Register the target.
- RegisterTargetMachine<MipsebTargetMachine> X(TheMipsTarget);
- RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
- RegisterTargetMachine<MipsebTargetMachine> A(TheMips64Target);
- RegisterTargetMachine<MipselTargetMachine> B(TheMips64elTarget);
+ RegisterTargetMachine<MipsebTargetMachine> X(getTheMipsTarget());
+ RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());
+ RegisterTargetMachine<MipsebTargetMachine> A(getTheMips64Target());
+ RegisterTargetMachine<MipselTargetMachine> B(getTheMips64elTarget());
}
static std::string computeDataLayout(const Triple &TT, StringRef CPU,
diff --git a/llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp b/llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
index 6a65943515b..4c1edfaaaec 100644
--- a/llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
+++ b/llvm/lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp
@@ -12,20 +12,37 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheMipsTarget, llvm::TheMipselTarget;
-Target llvm::TheMips64Target, llvm::TheMips64elTarget;
+Target &llvm::getTheMipsTarget() {
+ static Target TheMipsTarget;
+ return TheMipsTarget;
+}
+Target &llvm::getTheMipselTarget() {
+ static Target TheMipselTarget;
+ return TheMipselTarget;
+}
+Target &llvm::getTheMips64Target() {
+ static Target TheMips64Target;
+ return TheMips64Target;
+}
+Target &llvm::getTheMips64elTarget() {
+ static Target TheMips64elTarget;
+ return TheMips64elTarget;
+}
extern "C" void LLVMInitializeMipsTargetInfo() {
RegisterTarget<Triple::mips,
- /*HasJIT=*/true> X(TheMipsTarget, "mips", "Mips");
+ /*HasJIT=*/true>
+ X(getTheMipsTarget(), "mips", "Mips");
RegisterTarget<Triple::mipsel,
- /*HasJIT=*/true> Y(TheMipselTarget, "mipsel", "Mipsel");
+ /*HasJIT=*/true>
+ Y(getTheMipselTarget(), "mipsel", "Mipsel");
RegisterTarget<Triple::mips64,
- /*HasJIT=*/true> A(TheMips64Target, "mips64", "Mips64 [experimental]");
+ /*HasJIT=*/true>
+ A(getTheMips64Target(), "mips64", "Mips64 [experimental]");
RegisterTarget<Triple::mips64el,
- /*HasJIT=*/true> B(TheMips64elTarget,
- "mips64el", "Mips64el [experimental]");
+ /*HasJIT=*/true>
+ B(getTheMips64elTarget(), "mips64el", "Mips64el [experimental]");
}
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
index e356a965a04..12f99274936 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
@@ -60,7 +60,7 @@ static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
// Force static initialization.
extern "C" void LLVMInitializeNVPTXTargetMC() {
- for (Target *T : {&TheNVPTXTarget32, &TheNVPTXTarget64}) {
+ for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) {
// Register the MC asm info.
RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
diff --git a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
index bfd51239840..0c9ad977e7e 100644
--- a/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
+++ b/llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
@@ -19,8 +19,8 @@
namespace llvm {
class Target;
-extern Target TheNVPTXTarget32;
-extern Target TheNVPTXTarget64;
+Target &getTheNVPTXTarget32();
+Target &getTheNVPTXTarget64();
} // End llvm namespace
diff --git a/llvm/lib/Target/NVPTX/NVPTX.h b/llvm/lib/Target/NVPTX/NVPTX.h
index a882441275d..c6fd82fd6f9 100644
--- a/llvm/lib/Target/NVPTX/NVPTX.h
+++ b/llvm/lib/Target/NVPTX/NVPTX.h
@@ -57,8 +57,8 @@ FunctionPass *createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM);
BasicBlockPass *createNVPTXLowerAllocaPass();
MachineFunctionPass *createNVPTXPeephole();
-extern Target TheNVPTXTarget32;
-extern Target TheNVPTXTarget64;
+Target &getTheNVPTXTarget32();
+Target &getTheNVPTXTarget64();
namespace NVPTX {
enum DrvInterface {
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
index 5d94d5eefdd..a80e9dbb769 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
@@ -2380,6 +2380,6 @@ std::string LineReader::readLine(unsigned lineNum) {
// Force static initialization.
extern "C" void LLVMInitializeNVPTXAsmPrinter() {
- RegisterAsmPrinter<NVPTXAsmPrinter> X(TheNVPTXTarget32);
- RegisterAsmPrinter<NVPTXAsmPrinter> Y(TheNVPTXTarget64);
+ RegisterAsmPrinter<NVPTXAsmPrinter> X(getTheNVPTXTarget32());
+ RegisterAsmPrinter<NVPTXAsmPrinter> Y(getTheNVPTXTarget64());
}
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index 05df3e4ccc2..1373a6efea0 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -76,8 +76,8 @@ void initializeNVPTXLowerAllocaPass(PassRegistry &);
extern "C" void LLVMInitializeNVPTXTarget() {
// Register the target.
- RegisterTargetMachine<NVPTXTargetMachine32> X(TheNVPTXTarget32);
- RegisterTargetMachine<NVPTXTargetMachine64> Y(TheNVPTXTarget64);
+ RegisterTargetMachine<NVPTXTargetMachine32> X(getTheNVPTXTarget32());
+ RegisterTargetMachine<NVPTXTargetMachine64> Y(getTheNVPTXTarget64());
// FIXME: This pass is really intended to be invoked during IR optimization,
// but it's very NVPTX-specific.
diff --git a/llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp b/llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
index cc7d4dc5ece..d44876abf72 100644
--- a/llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
+++ b/llvm/lib/Target/NVPTX/TargetInfo/NVPTXTargetInfo.cpp
@@ -12,12 +12,18 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheNVPTXTarget32;
-Target llvm::TheNVPTXTarget64;
+Target &llvm::getTheNVPTXTarget32() {
+ static Target TheNVPTXTarget32;
+ return TheNVPTXTarget32;
+}
+Target &llvm::getTheNVPTXTarget64() {
+ static Target TheNVPTXTarget64;
+ return TheNVPTXTarget64;
+}
extern "C" void LLVMInitializeNVPTXTargetInfo() {
- RegisterTarget<Triple::nvptx> X(TheNVPTXTarget32, "nvptx",
+ RegisterTarget<Triple::nvptx> X(getTheNVPTXTarget32(), "nvptx",
"NVIDIA PTX 32-bit");
- RegisterTarget<Triple::nvptx64> Y(TheNVPTXTarget64, "nvptx64",
+ RegisterTarget<Triple::nvptx64> Y(getTheNVPTXTarget64(), "nvptx64",
"NVIDIA PTX 64-bit");
}
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index 8b3eac2e691..0d7a6375ced 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1980,9 +1980,9 @@ bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) {
/// Force static initialization.
extern "C" void LLVMInitializePowerPCAsmParser() {
- RegisterMCAsmParser<PPCAsmParser> A(ThePPC32Target);
- RegisterMCAsmParser<PPCAsmParser> B(ThePPC64Target);
- RegisterMCAsmParser<PPCAsmParser> C(ThePPC64LETarget);
+ RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
+ RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
+ RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
index c5eafcf2898..12ffbfdeacc 100644
--- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
+++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
@@ -51,11 +51,11 @@ static MCDisassembler *createPPCLEDisassembler(const Target &T,
extern "C" void LLVMInitializePowerPCDisassembler() {
// Register the disassembler for each target.
- TargetRegistry::RegisterMCDisassembler(ThePPC32Target,
+ TargetRegistry::RegisterMCDisassembler(getThePPC32Target(),
createPPCDisassembler);
- TargetRegistry::RegisterMCDisassembler(ThePPC64Target,
+ TargetRegistry::RegisterMCDisassembler(getThePPC64Target(),
createPPCDisassembler);
- TargetRegistry::RegisterMCDisassembler(ThePPC64LETarget,
+ TargetRegistry::RegisterMCDisassembler(getThePPC64LETarget(),
createPPCLEDisassembler);
}
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index c9074448fe4..bbd10e5b260 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -228,7 +228,8 @@ static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
}
extern "C" void LLVMInitializePowerPCTargetMC() {
- for (Target *T : {&ThePPC32Target, &ThePPC64Target, &ThePPC64LETarget}) {
+ for (Target *T :
+ {&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn C(*T, createPPCMCAsmInfo);
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
index ee35b45c689..0989e0c8e26 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
@@ -35,9 +35,9 @@ class StringRef;
class raw_pwrite_stream;
class raw_ostream;
-extern Target ThePPC32Target;
-extern Target ThePPC64Target;
-extern Target ThePPC64LETarget;
+Target &getThePPC32Target();
+Target &getThePPC64Target();
+Target &getThePPC64LETarget();
MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 1e864034d52..c347cfddc6d 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -1447,7 +1447,10 @@ createPPCAsmPrinterPass(TargetMachine &tm,
// Force static initialization.
extern "C" void LLVMInitializePowerPCAsmPrinter() {
- TargetRegistry::RegisterAsmPrinter(ThePPC32Target, createPPCAsmPrinterPass);
- TargetRegistry::RegisterAsmPrinter(ThePPC64Target, createPPCAsmPrinterPass);
- TargetRegistry::RegisterAsmPrinter(ThePPC64LETarget, createPPCAsmPrinterPass);
+ TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
+ createPPCAsmPrinterPass);
+ TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),
+ createPPCAsmPrinterPass);
+ TargetRegistry::RegisterAsmPrinter(getThePPC64LETarget(),
+ createPPCAsmPrinterPass);
}
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index 9b78739558c..81d125f4e38 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -74,9 +74,9 @@ EnableMachineCombinerPass("ppc-machine-combiner",
extern "C" void LLVMInitializePowerPCTarget() {
// Register the targets
- RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
- RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
- RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
+ RegisterTargetMachine<PPC32TargetMachine> A(getThePPC32Target());
+ RegisterTargetMachine<PPC64TargetMachine> B(getThePPC64Target());
+ RegisterTargetMachine<PPC64TargetMachine> C(getThePPC64LETarget());
PassRegistry &PR = *PassRegistry::getPassRegistry();
initializePPCBoolRetToIntPass(PR);
diff --git a/llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp b/llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
index 5b2fe19837e..a637dd11f81 100644
--- a/llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
+++ b/llvm/lib/Target/PowerPC/TargetInfo/PowerPCTargetInfo.cpp
@@ -12,15 +12,26 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::ThePPC32Target, llvm::ThePPC64Target, llvm::ThePPC64LETarget;
+Target &llvm::getThePPC32Target() {
+ static Target ThePPC32Target;
+ return ThePPC32Target;
+}
+Target &llvm::getThePPC64Target() {
+ static Target ThePPC64Target;
+ return ThePPC64Target;
+}
+Target &llvm::getThePPC64LETarget() {
+ static Target ThePPC64LETarget;
+ return ThePPC64LETarget;
+}
extern "C" void LLVMInitializePowerPCTargetInfo() {
- RegisterTarget<Triple::ppc, /*HasJIT=*/true>
- X(ThePPC32Target, "ppc32", "PowerPC 32");
+ RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32",
+ "PowerPC 32");
- RegisterTarget<Triple::ppc64, /*HasJIT=*/true>
- Y(ThePPC64Target, "ppc64", "PowerPC 64");
+ RegisterTarget<Triple::ppc64, /*HasJIT=*/true> Y(getThePPC64Target(), "ppc64",
+ "PowerPC 64");
- RegisterTarget<Triple::ppc64le, /*HasJIT=*/true>
- Z(ThePPC64LETarget, "ppc64le", "PowerPC 64 LE");
+ RegisterTarget<Triple::ppc64le, /*HasJIT=*/true> Z(
+ getThePPC64LETarget(), "ppc64le", "PowerPC 64 LE");
}
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 4ffb3736915..6232ba9a661 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -1263,9 +1263,9 @@ bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
}
extern "C" void LLVMInitializeSparcAsmParser() {
- RegisterMCAsmParser<SparcAsmParser> A(TheSparcTarget);
- RegisterMCAsmParser<SparcAsmParser> B(TheSparcV9Target);
- RegisterMCAsmParser<SparcAsmParser> C(TheSparcelTarget);
+ RegisterMCAsmParser<SparcAsmParser> A(getTheSparcTarget());
+ RegisterMCAsmParser<SparcAsmParser> B(getTheSparcV9Target());
+ RegisterMCAsmParser<SparcAsmParser> C(getTheSparcelTarget());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
index 1dea379e14e..da7e0b737e7 100644
--- a/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
+++ b/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
@@ -44,7 +44,9 @@ public:
}
namespace llvm {
-extern Target TheSparcTarget, TheSparcV9Target, TheSparcelTarget;
+Target &getTheSparcTarget();
+Target &getTheSparcV9Target();
+Target &getTheSparcelTarget();
}
static MCDisassembler *createSparcDisassembler(const Target &T,
@@ -56,11 +58,11 @@ static MCDisassembler *createSparcDisassembler(const Target &T,
extern "C" void LLVMInitializeSparcDisassembler() {
// Register the disassembler.
- TargetRegistry::RegisterMCDisassembler(TheSparcTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheSparcTarget(),
createSparcDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheSparcV9Target,
+ TargetRegistry::RegisterMCDisassembler(getTheSparcV9Target(),
createSparcDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheSparcelTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheSparcelTarget(),
createSparcDisassembler);
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
index dceaca791aa..889e2fd19ba 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
@@ -128,11 +128,12 @@ static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
extern "C" void LLVMInitializeSparcTargetMC() {
// Register the MC asm info.
- RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
- RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
- RegisterMCAsmInfoFn Z(TheSparcelTarget, createSparcMCAsmInfo);
+ RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
+ RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);
+ RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo);
- for (Target *T : {&TheSparcTarget, &TheSparcV9Target, &TheSparcelTarget}) {
+ for (Target *T :
+ {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) {
// Register the MC instruction info.
TargetRegistry::RegisterMCInstrInfo(*T, createSparcMCInstrInfo);
@@ -160,10 +161,10 @@ extern "C" void LLVMInitializeSparcTargetMC() {
}
// Register the MC codegen info.
- TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcTarget,
+ TargetRegistry::registerMCAdjustCodeGenOpts(getTheSparcTarget(),
adjustCodeGenOpts);
- TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcV9Target,
+ TargetRegistry::registerMCAdjustCodeGenOpts(getTheSparcV9Target(),
adjustCodeGenOptsV9);
- TargetRegistry::registerMCAdjustCodeGenOpts(TheSparcelTarget,
+ TargetRegistry::registerMCAdjustCodeGenOpts(getTheSparcelTarget(),
adjustCodeGenOpts);
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
index f07a374f69a..4e754c132d1 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
@@ -31,9 +31,9 @@ class StringRef;
class raw_pwrite_stream;
class raw_ostream;
-extern Target TheSparcTarget;
-extern Target TheSparcV9Target;
-extern Target TheSparcelTarget;
+Target &getTheSparcTarget();
+Target &getTheSparcV9Target();
+Target &getTheSparcelTarget();
MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
const MCRegisterInfo &MRI,
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index d361d858ba1..31a128a5f27 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -443,7 +443,7 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeSparcAsmPrinter() {
- RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
- RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);
- RegisterAsmPrinter<SparcAsmPrinter> Z(TheSparcelTarget);
+ RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget());
+ RegisterAsmPrinter<SparcAsmPrinter> Y(getTheSparcV9Target());
+ RegisterAsmPrinter<SparcAsmPrinter> Z(getTheSparcelTarget());
}
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index d8a047a72ba..0669eb6cc6a 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -22,9 +22,9 @@ using namespace llvm;
extern "C" void LLVMInitializeSparcTarget() {
// Register the target.
- RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
- RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
- RegisterTargetMachine<SparcelTargetMachine> Z(TheSparcelTarget);
+ RegisterTargetMachine<SparcV8TargetMachine> X(getTheSparcTarget());
+ RegisterTargetMachine<SparcV9TargetMachine> Y(getTheSparcV9Target());
+ RegisterTargetMachine<SparcelTargetMachine> Z(getTheSparcelTarget());
}
static std::string computeDataLayout(const Triple &T, bool is64Bit) {
diff --git a/llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp b/llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
index ab1c6beee4e..66178acd52b 100644
--- a/llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
+++ b/llvm/lib/Target/Sparc/TargetInfo/SparcTargetInfo.cpp
@@ -12,15 +12,24 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheSparcTarget;
-Target llvm::TheSparcV9Target;
-Target llvm::TheSparcelTarget;
+Target &llvm::getTheSparcTarget() {
+ static Target TheSparcTarget;
+ return TheSparcTarget;
+}
+Target &llvm::getTheSparcV9Target() {
+ static Target TheSparcV9Target;
+ return TheSparcV9Target;
+}
+Target &llvm::getTheSparcelTarget() {
+ static Target TheSparcelTarget;
+ return TheSparcelTarget;
+}
extern "C" void LLVMInitializeSparcTargetInfo() {
- RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(TheSparcTarget, "sparc",
+ RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(getTheSparcTarget(), "sparc",
"Sparc");
- RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(TheSparcV9Target,
+ RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(getTheSparcV9Target(),
"sparcv9", "Sparc V9");
- RegisterTarget<Triple::sparcel, /*HasJIT=*/true> Z(TheSparcelTarget,
+ RegisterTarget<Triple::sparcel, /*HasJIT=*/true> Z(getTheSparcelTarget(),
"sparcel", "Sparc LE");
}
diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
index 012b82f20e8..fcf0766c89c 100644
--- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
+++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
@@ -1171,5 +1171,5 @@ SystemZAsmParser::parsePCRel(OperandVector &Operands, int64_t MinVal,
// Force static initialization.
extern "C" void LLVMInitializeSystemZAsmParser() {
- RegisterMCAsmParser<SystemZAsmParser> X(TheSystemZTarget);
+ RegisterMCAsmParser<SystemZAsmParser> X(getTheSystemZTarget());
}
diff --git a/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp b/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
index 20e015b42d2..c82302dbcb5 100644
--- a/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
+++ b/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
@@ -42,7 +42,7 @@ static MCDisassembler *createSystemZDisassembler(const Target &T,
extern "C" void LLVMInitializeSystemZDisassembler() {
// Register the disassembler.
- TargetRegistry::RegisterMCDisassembler(TheSystemZTarget,
+ TargetRegistry::RegisterMCDisassembler(getTheSystemZTarget(),
createSystemZDisassembler);
}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
index e16ba9e1531..063be46add2 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
@@ -205,34 +205,34 @@ static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
extern "C" void LLVMInitializeSystemZTargetMC() {
// Register the MCAsmInfo.
- TargetRegistry::RegisterMCAsmInfo(TheSystemZTarget,
+ TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
createSystemZMCAsmInfo);
// Register the adjustCodeGenOpts.
- TargetRegistry::registerMCAdjustCodeGenOpts(TheSystemZTarget,
+ TargetRegistry::registerMCAdjustCodeGenOpts(getTheSystemZTarget(),
adjustCodeGenOpts);
// Register the MCCodeEmitter.
- TargetRegistry::RegisterMCCodeEmitter(TheSystemZTarget,
+ TargetRegistry::RegisterMCCodeEmitter(getTheSystemZTarget(),
createSystemZMCCodeEmitter);
// Register the MCInstrInfo.
- TargetRegistry::RegisterMCInstrInfo(TheSystemZTarget,
+ TargetRegistry::RegisterMCInstrInfo(getTheSystemZTarget(),
createSystemZMCInstrInfo);
// Register the MCRegisterInfo.
- TargetRegistry::RegisterMCRegInfo(TheSystemZTarget,
+ TargetRegistry::RegisterMCRegInfo(getTheSystemZTarget(),
createSystemZMCRegisterInfo);
// Register the MCSubtargetInfo.
- TargetRegistry::RegisterMCSubtargetInfo(TheSystemZTarget,
+ TargetRegistry::RegisterMCSubtargetInfo(getTheSystemZTarget(),
createSystemZMCSubtargetInfo);
// Register the MCAsmBackend.
- TargetRegistry::RegisterMCAsmBackend(TheSystemZTarget,
+ TargetRegistry::RegisterMCAsmBackend(getTheSystemZTarget(),
createSystemZMCAsmBackend);
// Register the MCInstPrinter.
- TargetRegistry::RegisterMCInstPrinter(TheSystemZTarget,
+ TargetRegistry::RegisterMCInstPrinter(getTheSystemZTarget(),
createSystemZMCInstPrinter);
}
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
index 99d2b88595d..498f5199cfb 100644
--- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
+++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
@@ -28,7 +28,7 @@ class Triple;
class raw_pwrite_stream;
class raw_ostream;
-extern Target TheSystemZTarget;
+Target &getTheSystemZTarget();
namespace SystemZMC {
// How many bytes are in the ABI-defined, caller-allocated part of
diff --git a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
index 9c0f327ff74..51570213544 100644
--- a/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
@@ -523,5 +523,5 @@ bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeSystemZAsmPrinter() {
- RegisterAsmPrinter<SystemZAsmPrinter> X(TheSystemZTarget);
+ RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
}
diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
index 85a3f6f4a8b..ceb79f7e774 100644
--- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
@@ -20,7 +20,7 @@ using namespace llvm;
extern cl::opt<bool> MISchedPostRA;
extern "C" void LLVMInitializeSystemZTarget() {
// Register the target.
- RegisterTargetMachine<SystemZTargetMachine> X(TheSystemZTarget);
+ RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
}
// Determine whether we use the vector ABI.
diff --git a/llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp b/llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp
index 8f9aa2811d0..d3c53a43b39 100644
--- a/llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp
+++ b/llvm/lib/Target/SystemZ/TargetInfo/SystemZTargetInfo.cpp
@@ -12,9 +12,12 @@
using namespace llvm;
-Target llvm::TheSystemZTarget;
+Target &llvm::getTheSystemZTarget() {
+ static Target TheSystemZTarget;
+ return TheSystemZTarget;
+}
extern "C" void LLVMInitializeSystemZTargetInfo() {
- RegisterTarget<Triple::systemz, /*HasJIT=*/true>
- X(TheSystemZTarget, "systemz", "SystemZ");
+ RegisterTarget<Triple::systemz, /*HasJIT=*/true> X(getTheSystemZTarget(),
+ "systemz", "SystemZ");
}
diff --git a/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp b/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
index 4a9b93f7016..715d57d1531 100644
--- a/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
+++ b/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp
@@ -54,9 +54,9 @@ static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
extern "C" void LLVMInitializeWebAssemblyDisassembler() {
// Register the disassembler for each target.
- TargetRegistry::RegisterMCDisassembler(TheWebAssemblyTarget32,
+ TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(),
createWebAssemblyDisassembler);
- TargetRegistry::RegisterMCDisassembler(TheWebAssemblyTarget64,
+ TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget64(),
createWebAssemblyDisassembler);
}
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
index e73005e46aa..5d7a0f82062 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
@@ -101,7 +101,8 @@ static MCTargetStreamer *createAsmTargetStreamer(MCStreamer &S,
// Force static initialization.
extern "C" void LLVMInitializeWebAssemblyTargetMC() {
- for (Target *T : {&TheWebAssemblyTarget32, &TheWebAssemblyTarget64}) {
+ for (Target *T :
+ {&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createMCAsmInfo);
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
index 651c077fab4..8f3adc28487 100644
--- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
+++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
@@ -30,8 +30,8 @@ class Target;
class Triple;
class raw_pwrite_stream;
-extern Target TheWebAssemblyTarget32;
-extern Target TheWebAssemblyTarget64;
+Target &getTheWebAssemblyTarget32();
+Target &getTheWebAssemblyTarget64();
MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);
diff --git a/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp b/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
index ddb1eb1d189..00427508270 100644
--- a/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
+++ b/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
@@ -19,12 +19,12 @@ using namespace llvm;
#define DEBUG_TYPE "wasm-target-info"
-Target llvm::TheWebAssemblyTarget32;
-Target llvm::TheWebAssemblyTarget64;
+Target llvm::getTheWebAssemblyTarget32();
+Target llvm::getTheWebAssemblyTarget64();
extern "C" void LLVMInitializeWebAssemblyTargetInfo() {
- RegisterTarget<Triple::wasm32> X(TheWebAssemblyTarget32, "wasm32",
+ RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32",
"WebAssembly 32-bit");
- RegisterTarget<Triple::wasm64> Y(TheWebAssemblyTarget64, "wasm64",
+ RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64",
"WebAssembly 64-bit");
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
index e921854af53..85ff1b80e3c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
@@ -313,6 +313,6 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
// Force static initialization.
extern "C" void LLVMInitializeWebAssemblyAsmPrinter() {
- RegisterAsmPrinter<WebAssemblyAsmPrinter> X(TheWebAssemblyTarget32);
- RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(TheWebAssemblyTarget64);
+ RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32());
+ RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64());
}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 524c49d4cc3..fe987f9e99d 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -43,8 +43,10 @@ static cl::opt<bool> EnableEmSjLj(
extern "C" void LLVMInitializeWebAssemblyTarget() {
// Register the target.
- RegisterTargetMachine<WebAssemblyTargetMachine> X(TheWebAssemblyTarget32);
- RegisterTargetMachine<WebAssemblyTargetMachine> Y(TheWebAssemblyTarget64);
+ RegisterTargetMachine<WebAssemblyTargetMachine> X(
+ getTheWebAssemblyTarget32());
+ RegisterTargetMachine<WebAssemblyTargetMachine> Y(
+ getTheWebAssemblyTarget64());
// Register exception handling pass to opt
initializeWebAssemblyLowerEmscriptenEHSjLjPass(
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 3df2ee70827..8cb75ae0f06 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -3065,8 +3065,8 @@ bool X86AsmParser::ParseDirectiveCode(StringRef IDVal, SMLoc L) {
// Force static initialization.
extern "C" void LLVMInitializeX86AsmParser() {
- RegisterMCAsmParser<X86AsmParser> X(TheX86_32Target);
- RegisterMCAsmParser<X86AsmParser> Y(TheX86_64Target);
+ RegisterMCAsmParser<X86AsmParser> X(getTheX86_32Target());
+ RegisterMCAsmParser<X86AsmParser> Y(getTheX86_64Target());
}
#define GET_REGISTER_MATCHER
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
index c9b53e6dda7..0e043f2bfe5 100644
--- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
+++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
@@ -1066,8 +1066,8 @@ static MCDisassembler *createX86Disassembler(const Target &T,
extern "C" void LLVMInitializeX86Disassembler() {
// Register the disassembler.
- TargetRegistry::RegisterMCDisassembler(TheX86_32Target,
+ TargetRegistry::RegisterMCDisassembler(getTheX86_32Target(),
createX86Disassembler);
- TargetRegistry::RegisterMCDisassembler(TheX86_64Target,
+ TargetRegistry::RegisterMCDisassembler(getTheX86_64Target(),
createX86Disassembler);
}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
index 311a8d677ee..22cb0fac33c 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
@@ -234,7 +234,7 @@ static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
// Force static initialization.
extern "C" void LLVMInitializeX86TargetMC() {
- for (Target *T : {&TheX86_32Target, &TheX86_64Target}) {
+ for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) {
// Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);
@@ -268,9 +268,9 @@ extern "C" void LLVMInitializeX86TargetMC() {
}
// Register the asm backend.
- TargetRegistry::RegisterMCAsmBackend(TheX86_32Target,
+ TargetRegistry::RegisterMCAsmBackend(getTheX86_32Target(),
createX86_32AsmBackend);
- TargetRegistry::RegisterMCAsmBackend(TheX86_64Target,
+ TargetRegistry::RegisterMCAsmBackend(getTheX86_64Target(),
createX86_64AsmBackend);
}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
index 5f2db2e12b4..f73e734b9b0 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
@@ -34,7 +34,8 @@ class StringRef;
class raw_ostream;
class raw_pwrite_stream;
-extern Target TheX86_32Target, TheX86_64Target;
+Target &getTheX86_32Target();
+Target &getTheX86_64Target();
/// Flavour of dwarf regnumbers
///
diff --git a/llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp b/llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
index fceb083b5f2..d2654fc67ed 100644
--- a/llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
+++ b/llvm/lib/Target/X86/TargetInfo/X86TargetInfo.cpp
@@ -11,12 +11,19 @@
#include "llvm/Support/TargetRegistry.h"
using namespace llvm;
-Target llvm::TheX86_32Target, llvm::TheX86_64Target;
+Target &llvm::getTheX86_32Target() {
+ static Target TheX86_32Target;
+ return TheX86_32Target;
+}
+Target &llvm::getTheX86_64Target() {
+ static Target TheX86_64Target;
+ return TheX86_64Target;
+}
extern "C" void LLVMInitializeX86TargetInfo() {
- RegisterTarget<Triple::x86, /*HasJIT=*/true>
- X(TheX86_32Target, "x86", "32-bit X86: Pentium-Pro and above");
+ RegisterTarget<Triple::x86, /*HasJIT=*/true> X(
+ getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above");
- RegisterTarget<Triple::x86_64, /*HasJIT=*/true>
- Y(TheX86_64Target, "x86-64", "64-bit X86: EM64T and AMD64");
+ RegisterTarget<Triple::x86_64, /*HasJIT=*/true> Y(
+ getTheX86_64Target(), "x86-64", "64-bit X86: EM64T and AMD64");
}
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp
index b922c212a5d..d39f46ae4ab 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp
@@ -656,6 +656,6 @@ void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
// Force static initialization.
extern "C" void LLVMInitializeX86AsmPrinter() {
- RegisterAsmPrinter<X86AsmPrinter> X(TheX86_32Target);
- RegisterAsmPrinter<X86AsmPrinter> Y(TheX86_64Target);
+ RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
+ RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
}
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 53480eb0ba9..5dfa87b5848 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -35,8 +35,8 @@ void initializeWinEHStatePassPass(PassRegistry &);
extern "C" void LLVMInitializeX86Target() {
// Register the target.
- RegisterTargetMachine<X86TargetMachine> X(TheX86_32Target);
- RegisterTargetMachine<X86TargetMachine> Y(TheX86_64Target);
+ RegisterTargetMachine<X86TargetMachine> X(getTheX86_32Target());
+ RegisterTargetMachine<X86TargetMachine> Y(getTheX86_64Target());
PassRegistry &PR = *PassRegistry::getPassRegistry();
initializeWinEHStatePassPass(PR);
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