diff options
Diffstat (limited to 'llvm/lib/Target')
5 files changed, 50 insertions, 21 deletions
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp index ec13245c0eb..02e47afeb91 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -1,4 +1,4 @@ -//===-- AMDGPUBaseInfo.cpp - AMDGPU Base encoding information--------------===// +//===- AMDGPUBaseInfo.cpp - AMDGPU Base encoding information --------------===// // // The LLVM Compiler Infrastructure // @@ -6,20 +6,34 @@ // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// -#include "AMDGPUBaseInfo.h" + #include "AMDGPU.h" +#include "AMDGPUBaseInfo.h" #include "SIDefines.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Triple.h" #include "llvm/CodeGen/MachineMemOperand.h" +#include "llvm/IR/Attributes.h" #include "llvm/IR/Constants.h" #include "llvm/IR/Function.h" #include "llvm/IR/GlobalValue.h" +#include "llvm/IR/Instruction.h" #include "llvm/IR/LLVMContext.h" #include "llvm/MC/MCContext.h" -#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCInstrDesc.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSectionELF.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/SubtargetFeature.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/ELF.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MathExtras.h" +#include <algorithm> +#include <cassert> +#include <cstdint> +#include <cstring> +#include <utility> #define GET_SUBTARGETINFO_ENUM #include "AMDGPUGenSubtargetInfo.inc" @@ -76,7 +90,7 @@ unsigned getLgkmcntBitShift() { return 8; } /// \returns Lgkmcnt bit width. unsigned getLgkmcntBitWidth() { return 4; } -} // namespace anonymous +} // end namespace anonymous namespace llvm { namespace AMDGPU { @@ -268,7 +282,7 @@ unsigned getMaxNumVGPRs(const FeatureBitset &Features, unsigned WavesPerEU) { return std::min(MaxNumVGPRs, AddressableNumVGPRs); } -} // namespace IsaInfo +} // end namespace IsaInfo void initDefaultAMDKernelCodeT(amd_kernel_code_t &Header, const FeatureBitset &Features) { @@ -371,7 +385,7 @@ std::pair<int, int> getIntegerPairAttribute(const Function &F, return Default; } if (Strs.second.trim().getAsInteger(0, Ints.second)) { - if (!OnlyFirstRequired || Strs.second.trim().size()) { + if (!OnlyFirstRequired || !Strs.second.trim().empty()) { Ctx.emitError("can't parse second integer attribute " + Name); return Default; } @@ -655,5 +669,5 @@ bool isLegalSMRDImmOffset(const MCSubtargetInfo &ST, int64_t ByteOffset) { isUInt<20>(EncodedOffset); } -} // End namespace AMDGPU -} // End namespace llvm +} // end namespace AMDGPU +} // end namespace llvm diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h index 6efc38a5bf4..a8d82ba4519 100644 --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h @@ -1,4 +1,4 @@ -//===-- AMDGPUBaseInfo.h - Top level definitions for AMDGPU -----*- C++ -*-===// +//===- AMDGPUBaseInfo.h - Top level definitions for AMDGPU ------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -11,9 +11,14 @@ #define LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUBASEINFO_H #include "AMDKernelCodeT.h" -#include "llvm/IR/CallingConv.h" - #include "SIDefines.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/IR/CallingConv.h" +#include "llvm/MC/MCInstrDesc.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/ErrorHandling.h" +#include <cstdint> +#include <utility> #define GET_INSTRINFO_OPERAND_ENUM #include "AMDGPUGenInstrInfo.inc" @@ -26,14 +31,13 @@ class Function; class GlobalValue; class MachineMemOperand; class MCContext; -class MCInstrDesc; class MCRegisterClass; class MCRegisterInfo; class MCSection; class MCSubtargetInfo; +class Triple; namespace AMDGPU { - namespace IsaInfo { enum { @@ -141,7 +145,7 @@ unsigned getMinNumVGPRs(const FeatureBitset &Features, unsigned WavesPerEU); /// execution unit requirement for given subtarget \p Features. unsigned getMaxNumVGPRs(const FeatureBitset &Features, unsigned WavesPerEU); -} // namespace IsaInfo +} // end namespace IsaInfo LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx); @@ -330,4 +334,4 @@ bool isLegalSMRDImmOffset(const MCSubtargetInfo &ST, int64_t ByteOffset); } // end namespace AMDGPU } // end namespace llvm -#endif +#endif // LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUBASEINFO_H diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp index 24b602810d6..74d5e4cc984 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp @@ -1,4 +1,4 @@ -//===-- MipsOptionRecord.cpp - Abstraction for storing information --------===// +//===- MipsOptionRecord.cpp - Abstraction for storing information ---------===// // // The LLVM Compiler Infrastructure // @@ -7,10 +7,16 @@ // //===----------------------------------------------------------------------===// -#include "MipsOptionRecord.h" +#include "MipsABIInfo.h" #include "MipsELFStreamer.h" +#include "MipsOptionRecord.h" #include "MipsTargetStreamer.h" +#include "llvm/MC/MCAssembler.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSectionELF.h" +#include "llvm/Support/ELF.h" +#include <cassert> using namespace llvm; diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp index 280c6d7937b..3ed09898fb7 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp @@ -1,4 +1,4 @@ -//===-- SparcMCAsmInfo.cpp - Sparc asm properties -------------------------===// +//===- SparcMCAsmInfo.cpp - Sparc asm properties --------------------------===// // // The LLVM Compiler Infrastructure // @@ -14,7 +14,10 @@ #include "SparcMCAsmInfo.h" #include "SparcMCExpr.h" #include "llvm/ADT/Triple.h" +#include "llvm/MC/MCExpr.h" #include "llvm/MC/MCStreamer.h" +#include "llvm/MC/MCTargetOptions.h" +#include "llvm/Support/Dwarf.h" using namespace llvm; diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h index ad441227600..5e8d0cb5031 100644 --- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h +++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h @@ -1,4 +1,4 @@ -//===-- SparcMCAsmInfo.h - Sparc asm properties ----------------*- C++ -*--===// +//===- SparcMCAsmInfo.h - Sparc asm properties -----------------*- C++ -*--===// // // The LLVM Compiler Infrastructure // @@ -17,6 +17,7 @@ #include "llvm/MC/MCAsmInfoELF.h" namespace llvm { + class Triple; class SparcELFMCAsmInfo : public MCAsmInfoELF { @@ -24,6 +25,7 @@ class SparcELFMCAsmInfo : public MCAsmInfoELF { public: explicit SparcELFMCAsmInfo(const Triple &TheTriple); + const MCExpr* getExprForPersonalitySymbol(const MCSymbol *Sym, unsigned Encoding, MCStreamer &Streamer) const override; @@ -33,6 +35,6 @@ public: }; -} // namespace llvm +} // end namespace llvm -#endif +#endif // LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCMCASMINFO_H |
