diff options
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCExpandISEL.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp index a8b6b611620..fe41e1b36a5 100644 --- a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp +++ b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp @@ -285,7 +285,7 @@ void PPCExpandISEL::handleSpecialCases(BlockISELList &BIL, // Special case 1, all registers used by ISEL are the same one. if (!IsADDIInstRequired && !IsORIInstRequired) { - LLVM_DEBUG(dbgs() << "Remove redudant ISEL instruction."); + LLVM_DEBUG(dbgs() << "Remove redundant ISEL instruction."); // FIXME: if the CR field used has no other uses, we could eliminate the // instruction that defines it. This would have to be done manually // since this pass runs too late to run DCE after it. @@ -305,7 +305,7 @@ void PPCExpandISEL::handleSpecialCases(BlockISELList &BIL, // thereby preventing this ISEL from being folded. if (useSameRegister(TrueValue, FalseValue) && (BIL.size() == 1)) { LLVM_DEBUG( - dbgs() << "Fold the ISEL instruction to an unconditonal copy."); + dbgs() << "Fold the ISEL instruction to an unconditional copy."); NumFolded++; // Note: we're using both the TrueValue and FalseValue operands so as // not to lose the kill flag if it is set on either of them. diff --git a/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp b/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp index 9c2350f0f2f..173fc18b9eb 100644 --- a/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp +++ b/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp @@ -67,7 +67,7 @@ static void updatePHIs(MachineBasicBlock *Successor, MachineBasicBlock *OrigMBB, for (unsigned i = 2, e = MI.getNumOperands() + 1; i != e; i += 2) { MachineOperand &MO = MI.getOperand(i); if (MO.getMBB() == OrigMBB) { - // Check if the instruction is actualy defined in NewMBB. + // Check if the instruction is actually defined in NewMBB. if (MI.getOperand(i - 1).isReg()) { MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(i - 1).getReg()); if (DefMI->getParent() == NewMBB || @@ -152,7 +152,7 @@ static bool splitMBB(BlockSplitInfo &BSI) { if (ThisMBB->succ_size() != 2) { LLVM_DEBUG( dbgs() << "Don't know how to handle blocks that don't have exactly" - << " two succesors.\n"); + << " two successors.\n"); return false; } |
