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-rw-r--r--llvm/lib/Target/AMDGPU/SOPInstructions.td4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index ec29a66c8bb..f2d8b6f7b7a 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -184,9 +184,7 @@ def S_BITSET0_B32 : SOP1_32 <"s_bitset0_b32">;
def S_BITSET0_B64 : SOP1_64_32 <"s_bitset0_b64">;
def S_BITSET1_B32 : SOP1_32 <"s_bitset1_b32">;
def S_BITSET1_B64 : SOP1_64_32 <"s_bitset1_b64">;
-def S_GETPC_B64 : SOP1_64_0 <"s_getpc_b64",
- [(set i64:$sdst, (int_amdgcn_s_getpc))]
->;
+def S_GETPC_B64 : SOP1_64_0 <"s_getpc_b64">;
let isTerminator = 1, isBarrier = 1, SchedRW = [WriteBranch] in {
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