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-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 72793e0e333..c5e4b8653c0 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -4946,6 +4946,10 @@ def : MnemonicAlias<"srs", "srsia">;
def : MnemonicAlias<"qsubaddx", "qsax">;
// SASX == SADDSUBX
def : MnemonicAlias<"saddsubx", "sasx">;
+// SHASX == SHADDSUBX
+def : MnemonicAlias<"shaddsubx", "shasx">;
+// SHSAX == SHSUBADDX
+def : MnemonicAlias<"shsubaddx", "shsax">;
// LDRSBT/LDRHT/LDRSHT post-index offset if optional.
// Note that the write-back output register is a dummy operand for MC (it's
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