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-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h2
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp2
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
index 99bb61b21db..1adf0168dde 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
@@ -30,7 +30,7 @@ class AMDGPUMachineFunction : public MachineFunctionInfo {
/// Start of implicit kernel args
unsigned ABIArgOffset;
- // Kernels + shaders. i.e. functions called by the driver and not not called
+ // Kernels + shaders. i.e. functions called by the driver and not called
// by other functions.
bool IsEntryFunction;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 08e4f6387b6..c876ce7b2f8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -22371,7 +22371,7 @@ static SDValue LowerABS(SDValue Op, SelectionDAG &DAG) {
static SDValue LowerMINMAX(SDValue Op, SelectionDAG &DAG) {
MVT VT = Op.getSimpleValueType();
- // For AVX1 cases, split to use use legal ops (everything but v4i64).
+ // For AVX1 cases, split to use legal ops (everything but v4i64).
if (VT.getScalarType() != MVT::i64 && VT.is256BitVector())
return Lower256IntArith(Op, DAG);
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