diff options
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86IntrinsicsInfo.h | 8 | 
4 files changed, 10 insertions, 7 deletions
| diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 086dbd5dd83..68d4c298e51 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -21753,7 +21753,9 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {    case X86ISD::FMAXC:              return "X86ISD::FMAXC";    case X86ISD::FMINC:              return "X86ISD::FMINC";    case X86ISD::FRSQRT:             return "X86ISD::FRSQRT"; +  case X86ISD::FRSQRTS:             return "X86ISD::FRSQRTS";    case X86ISD::FRCP:               return "X86ISD::FRCP"; +  case X86ISD::FRCPS:              return "X86ISD::FRCPS";    case X86ISD::EXTRQI:             return "X86ISD::EXTRQI";    case X86ISD::INSERTQI:           return "X86ISD::INSERTQI";    case X86ISD::TLSADDR:            return "X86ISD::TLSADDR"; diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index 6cebebefd01..44125061a6c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -250,7 +250,8 @@ namespace llvm {        /// Note that these typically require refinement        /// in order to obtain suitable precision.        FRSQRT, FRCP, - +      FRSQRTS, FRCPS, +           // Thread Local Storage.        TLSADDR, diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td index b1e35184e57..c86475ed298 100644 --- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -60,8 +60,8 @@ def X86fandn   : SDNode<"X86ISD::FANDN",     SDTFPBinOp,                          [SDNPCommutative, SDNPAssociative]>;  def X86frsqrt  : SDNode<"X86ISD::FRSQRT",    SDTFPUnaryOp>;  def X86frcp    : SDNode<"X86ISD::FRCP",      SDTFPUnaryOp>; -def X86frsqrt14s: SDNode<"X86ISD::FRSQRT",  SDTFPBinOp>; -def X86frcp14s : SDNode<"X86ISD::FRCP",    SDTFPBinOp>; +def X86frsqrt14s: SDNode<"X86ISD::FRSQRTS",  SDTFPBinOp>; +def X86frcp14s : SDNode<"X86ISD::FRCPS",    SDTFPBinOp>;  def X86fhadd   : SDNode<"X86ISD::FHADD",     SDTFPBinOp>;  def X86fhsub   : SDNode<"X86ISD::FHSUB",     SDTFPBinOp>;  def X86hadd    : SDNode<"X86ISD::HADD",      SDTIntBinOp>; diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h index 742b14095ab..f9e27ce6f0c 100644 --- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h +++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h @@ -2125,8 +2125,8 @@ static const IntrinsicData  IntrinsicsWithoutChain[] = {    X86_INTRINSIC_DATA(avx512_rcp14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),    X86_INTRINSIC_DATA(avx512_rcp14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0),    X86_INTRINSIC_DATA(avx512_rcp14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRCP, 0), -  X86_INTRINSIC_DATA(avx512_rcp14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRCP, 0), -  X86_INTRINSIC_DATA(avx512_rcp14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRCP, 0), +  X86_INTRINSIC_DATA(avx512_rcp14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRCPS, 0), +  X86_INTRINSIC_DATA(avx512_rcp14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRCPS, 0),    X86_INTRINSIC_DATA(avx512_rcp28_pd, INTR_TYPE_1OP_MASK_RM, X86ISD::RCP28, 0),    X86_INTRINSIC_DATA(avx512_rcp28_ps, INTR_TYPE_1OP_MASK_RM, X86ISD::RCP28, 0),    X86_INTRINSIC_DATA(avx512_rcp28_sd, INTR_TYPE_SCALAR_MASK_RM, X86ISD::RCP28, 0), @@ -2137,8 +2137,8 @@ static const IntrinsicData  IntrinsicsWithoutChain[] = {    X86_INTRINSIC_DATA(avx512_rsqrt14_ps_128, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),    X86_INTRINSIC_DATA(avx512_rsqrt14_ps_256, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0),    X86_INTRINSIC_DATA(avx512_rsqrt14_ps_512, INTR_TYPE_1OP_MASK, X86ISD::FRSQRT, 0), -  X86_INTRINSIC_DATA(avx512_rsqrt14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRT, 0), -  X86_INTRINSIC_DATA(avx512_rsqrt14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRT, 0), +  X86_INTRINSIC_DATA(avx512_rsqrt14_sd, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0), +  X86_INTRINSIC_DATA(avx512_rsqrt14_ss, INTR_TYPE_SCALAR_MASK, X86ISD::FRSQRTS, 0),    X86_INTRINSIC_DATA(avx512_rsqrt28_pd, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),    X86_INTRINSIC_DATA(avx512_rsqrt28_ps, INTR_TYPE_1OP_MASK_RM,X86ISD::RSQRT28, 0),    X86_INTRINSIC_DATA(avx512_rsqrt28_sd, INTR_TYPE_SCALAR_MASK_RM,X86ISD::RSQRT28, 0), | 

