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-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp20
-rw-r--r--llvm/lib/Target/ARM/ARMParallelDSP.cpp2
-rw-r--r--llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp3
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp3
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp3
5 files changed, 19 insertions, 12 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
index 022e8a060ed..90ea2467b2d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
@@ -65,20 +65,21 @@ private:
StringRef fmt, size_t num_ops) const;
bool shouldPrintAsStr(char Specifier, Type *OpType) const;
- bool lowerPrintfForGpu(Module &M);
+ bool
+ lowerPrintfForGpu(Module &M,
+ function_ref<const TargetLibraryInfo &(Function &)> GetTLI);
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<TargetLibraryInfoWrapperPass>();
AU.addRequired<DominatorTreeWrapperPass>();
}
- Value *simplify(Instruction *I) {
+ Value *simplify(Instruction *I, const TargetLibraryInfo *TLI) {
return SimplifyInstruction(I, {*TD, TLI, DT});
}
const DataLayout *TD;
const DominatorTree *DT;
- const TargetLibraryInfo *TLI;
SmallVector<Value *, 32> Printfs;
};
} // namespace
@@ -102,7 +103,7 @@ ModulePass *createAMDGPUPrintfRuntimeBinding() {
} // namespace llvm
AMDGPUPrintfRuntimeBinding::AMDGPUPrintfRuntimeBinding()
- : ModulePass(ID), TD(nullptr), DT(nullptr), TLI(nullptr) {
+ : ModulePass(ID), TD(nullptr), DT(nullptr) {
initializeAMDGPUPrintfRuntimeBindingPass(*PassRegistry::getPassRegistry());
}
@@ -152,7 +153,8 @@ bool AMDGPUPrintfRuntimeBinding::shouldPrintAsStr(char Specifier,
return ElemIType->getBitWidth() == 8;
}
-bool AMDGPUPrintfRuntimeBinding::lowerPrintfForGpu(Module &M) {
+bool AMDGPUPrintfRuntimeBinding::lowerPrintfForGpu(
+ Module &M, function_ref<const TargetLibraryInfo &(Function &)> GetTLI) {
LLVMContext &Ctx = M.getContext();
IRBuilder<> Builder(Ctx);
Type *I32Ty = Type::getInt32Ty(Ctx);
@@ -179,7 +181,7 @@ bool AMDGPUPrintfRuntimeBinding::lowerPrintfForGpu(Module &M) {
}
if (auto I = dyn_cast<Instruction>(Op)) {
- Value *Op_simplified = simplify(I);
+ Value *Op_simplified = simplify(I, &GetTLI(*I->getFunction()));
if (Op_simplified)
Op = Op_simplified;
}
@@ -585,7 +587,9 @@ bool AMDGPUPrintfRuntimeBinding::runOnModule(Module &M) {
TD = &M.getDataLayout();
auto DTWP = getAnalysisIfAvailable<DominatorTreeWrapperPass>();
DT = DTWP ? &DTWP->getDomTree() : nullptr;
- TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
+ auto GetTLI = [this](Function &F) -> TargetLibraryInfo & {
+ return this->getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
+ };
- return lowerPrintfForGpu(M);
+ return lowerPrintfForGpu(M, GetTLI);
}
diff --git a/llvm/lib/Target/ARM/ARMParallelDSP.cpp b/llvm/lib/Target/ARM/ARMParallelDSP.cpp
index cb022dd0126..c65c31cbc82 100644
--- a/llvm/lib/Target/ARM/ARMParallelDSP.cpp
+++ b/llvm/lib/Target/ARM/ARMParallelDSP.cpp
@@ -254,7 +254,7 @@ namespace {
SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
- TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
+ TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(F);
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
auto &TPC = getAnalysis<TargetPassConfig>();
diff --git a/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp b/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
index d6e40dda02f..18be03332f8 100644
--- a/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
@@ -2426,7 +2426,8 @@ bool HexagonLoopIdiomRecognize::runOnLoop(Loop *L, LPPassManager &LPM) {
DL = &L->getHeader()->getModule()->getDataLayout();
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
LF = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
- TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
+ TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(
+ *L->getHeader()->getParent());
SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
HasMemcpy = TLI->has(LibFunc_memcpy);
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
index e80bf1d03a5..ac428fcc826 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
@@ -184,7 +184,8 @@ bool WebAssemblyMemIntrinsicResults::runOnMachineFunction(MachineFunction &MF) {
auto &MDT = getAnalysis<MachineDominatorTree>();
const WebAssemblyTargetLowering &TLI =
*MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
- const auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
+ const auto &LibInfo =
+ getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(MF.getFunction());
auto &LIS = getAnalysis<LiveIntervals>();
bool Changed = false;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
index 282dc08dc5f..63b87d6bdc5 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
@@ -120,7 +120,8 @@ bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) {
const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
const WebAssemblyTargetLowering &TLI =
*MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering();
- auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
+ auto &LibInfo =
+ getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(MF.getFunction());
bool Changed = false;
for (auto &MBB : MF)
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