diff options
Diffstat (limited to 'llvm/lib/Target')
9 files changed, 173 insertions, 121 deletions
diff --git a/llvm/lib/Target/WebAssembly/CMakeLists.txt b/llvm/lib/Target/WebAssembly/CMakeLists.txt index 47fa9c631ba..96f039bed75 100644 --- a/llvm/lib/Target/WebAssembly/CMakeLists.txt +++ b/llvm/lib/Target/WebAssembly/CMakeLists.txt @@ -21,7 +21,6 @@ add_llvm_target(WebAssemblyCodeGen WebAssemblyMachineFunctionInfo.cpp WebAssemblyMCInstLower.cpp WebAssemblyRegisterInfo.cpp - WebAssemblyRegNumbering.cpp WebAssemblySelectionDAGInfo.cpp WebAssemblySubtarget.cpp WebAssemblyTargetMachine.cpp diff --git a/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp b/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp index cc77f56dce3..bb10f20fd6d 100644 --- a/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp @@ -36,50 +36,28 @@ WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI, void WebAssemblyInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { - // FIXME: Revisit whether we actually print the get_local explicitly. - OS << "(get_local " << RegNo << ")"; + if (TargetRegisterInfo::isPhysicalRegister(RegNo)) + OS << getRegisterName(RegNo); + else + OS << TargetRegisterInfo::virtReg2Index(RegNo); } void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI) { printInstruction(MI, OS); - - const MCInstrDesc &Desc = MII.get(MI->getOpcode()); - if (Desc.isVariadic()) - for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e; - ++i) { - OS << ", "; - printOperand(MI, i, OS); - } - printAnnotation(OS, Annot); unsigned NumDefs = MII.get(MI->getOpcode()).getNumDefs(); assert(NumDefs <= 1 && "Instructions with multiple result values not implemented"); - // FIXME: Revisit whether we actually print the set_local explicitly. - if (NumDefs != 0) + if (NumDefs != 0) { OS << "\n" - "\t" "set_local " << MI->getOperand(0).getReg() << ", $pop"; -} - -static std::string toString(const APFloat &FP) { - static const size_t BufBytes = 128; - char buf[BufBytes]; - if (FP.isNaN()) - assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) || - FP.bitwiseIsEqual( - APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) && - "convertToHexString handles neither SNaN nor NaN payloads"); - // Use C99's hexadecimal floating-point representation. - auto Written = FP.convertToHexString( - buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven); - (void)Written; - assert(Written != 0); - assert(Written < BufBytes); - return buf; + "\t" "set_local "; + printRegName(OS, MI->getOperand(0).getReg()); + OS << ", pop"; + } } void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, @@ -87,13 +65,13 @@ void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, const MCOperand &Op = MI->getOperand(OpNo); if (Op.isReg()) { if (OpNo < MII.get(MI->getOpcode()).getNumDefs()) - O << "$push"; + O << "push"; else printRegName(O, Op.getReg()); } else if (Op.isImm()) - O << Op.getImm(); + O << '#' << Op.getImm(); else if (Op.isFPImm()) - O << toString(APFloat(Op.getFPImm())); + O << '#' << Op.getFPImm(); else { assert(Op.isExpr() && "unknown operand kind in printOperand"); Op.getExpr()->print(O, &MAI); diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.h b/llvm/lib/Target/WebAssembly/WebAssembly.h index be6c20c1a7c..0109c00ef2f 100644 --- a/llvm/lib/Target/WebAssembly/WebAssembly.h +++ b/llvm/lib/Target/WebAssembly/WebAssembly.h @@ -27,7 +27,6 @@ FunctionPass *createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOpt::Level OptLevel); FunctionPass *createWebAssemblyCFGStackify(); -FunctionPass *createWebAssemblyRegNumbering(); FunctionPass *createWebAssemblyRelooper(); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index 641d6ea2b86..27095ec51df 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -15,12 +15,12 @@ //===----------------------------------------------------------------------===// #include "WebAssembly.h" -#include "InstPrinter/WebAssemblyInstPrinter.h" -#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" -#include "WebAssemblyMCInstLower.h" #include "WebAssemblyMachineFunctionInfo.h" #include "WebAssemblyRegisterInfo.h" #include "WebAssemblySubtarget.h" +#include "InstPrinter/WebAssemblyInstPrinter.h" +#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" + #include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringExtras.h" #include "llvm/CodeGen/Analysis.h" @@ -28,7 +28,7 @@ #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/IR/DataLayout.h" -#include "llvm/MC/MCContext.h" +#include "llvm/IR/DebugInfo.h" #include "llvm/MC/MCStreamer.h" #include "llvm/MC/MCSymbol.h" #include "llvm/Support/Debug.h" @@ -42,12 +42,13 @@ using namespace llvm; namespace { class WebAssemblyAsmPrinter final : public AsmPrinter { + const WebAssemblyInstrInfo *TII; const MachineRegisterInfo *MRI; - const WebAssemblyFunctionInfo *MFI; + unsigned NumArgs; public: WebAssemblyAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer) - : AsmPrinter(TM, std::move(Streamer)), MRI(nullptr), MFI(nullptr) {} + : AsmPrinter(TM, std::move(Streamer)), TII(nullptr), MRI(nullptr) {} private: const char *getPassName() const override { @@ -63,8 +64,10 @@ private: } bool runOnMachineFunction(MachineFunction &MF) override { + const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>(); + TII = Subtarget.getInstrInfo(); MRI = &MF.getRegInfo(); - MFI = MF.getInfo<WebAssemblyFunctionInfo>(); + NumArgs = MF.getInfo<WebAssemblyFunctionInfo>()->getParams().size(); return AsmPrinter::runOnMachineFunction(MF); } @@ -79,8 +82,10 @@ private: void EmitEndOfAsmFile(Module &M) override; std::string getRegTypeName(unsigned RegNo) const; + static std::string toString(const APFloat &APF); const char *toString(MVT VT) const; std::string regToString(const MachineOperand &MO); + std::string argToString(const MachineOperand &MO); }; } // end anonymous namespace @@ -89,6 +94,36 @@ private: // Helpers. //===----------------------------------------------------------------------===// +// Operand type (if any), followed by the lower-case version of the opcode's +// name matching the names WebAssembly opcodes are expected to have. The +// tablegen names are uppercase and suffixed with their type (after an +// underscore). Conversions are additionally prefixed with their input type +// (before a double underscore). +static std::string OpcodeName(const WebAssemblyInstrInfo *TII, + const MachineInstr *MI) { + std::string N(StringRef(TII->getName(MI->getOpcode())).lower()); + std::string::size_type Len = N.length(); + std::string::size_type Under = N.rfind('_'); + bool HasType = std::string::npos != Under; + std::string::size_type NameEnd = HasType ? Under : Len; + std::string Name(&N[0], &N[NameEnd]); + if (!HasType) + return Name; + for (const char *typelessOpcode : { "return", "call", "br_if" }) + if (Name == typelessOpcode) + return Name; + std::string Type(&N[NameEnd + 1], &N[Len]); + std::string::size_type DoubleUnder = Name.find("__"); + bool IsConv = std::string::npos != DoubleUnder; + if (!IsConv) + return Type + '.' + Name; + std::string InType(&Name[0], &Name[DoubleUnder]); + return Type + '.' + std::string(&Name[DoubleUnder + 2], &Name[NameEnd]) + + '/' + InType; +} + +static std::string toSymbol(StringRef S) { return ("$" + S).str(); } + std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const { const TargetRegisterClass *TRC = MRI->getRegClass(RegNo); for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64}) @@ -99,12 +134,38 @@ std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const { return "?"; } +std::string WebAssemblyAsmPrinter::toString(const APFloat &FP) { + static const size_t BufBytes = 128; + char buf[BufBytes]; + if (FP.isNaN()) + assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) || + FP.bitwiseIsEqual( + APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) && + "convertToHexString handles neither SNaN nor NaN payloads"); + // Use C99's hexadecimal floating-point representation. + auto Written = FP.convertToHexString( + buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven); + (void)Written; + assert(Written != 0); + assert(Written < BufBytes); + return buf; +} + std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) { unsigned RegNo = MO.getReg(); if (TargetRegisterInfo::isPhysicalRegister(RegNo)) return WebAssemblyInstPrinter::getRegisterName(RegNo); - return utostr(MFI->getWAReg(RegNo)); + // WebAssembly arguments and local variables are in the same index space, and + // there are no explicit varargs, so we just add the number of arguments to + // the virtual register number to get the local variable number. + return utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs); +} + +std::string WebAssemblyAsmPrinter::argToString(const MachineOperand &MO) { + unsigned ArgNo = MO.getImm(); + // Same as above, but we don't need to add NumArgs here. + return utostr(ArgNo); } const char *WebAssemblyAsmPrinter::toString(MVT VT) const { @@ -142,22 +203,26 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() { SmallString<128> Str; raw_svector_ostream OS(Str); - for (MVT VT : MFI->getParams()) - OS << "\t" ".param " << toString(VT) << '\n'; - for (MVT VT : MFI->getResults()) - OS << "\t" ".result " << toString(VT) << '\n'; + for (MVT VT : MF->getInfo<WebAssemblyFunctionInfo>()->getParams()) + OS << "\t" ".param " + << toString(VT) << '\n'; + for (MVT VT : MF->getInfo<WebAssemblyFunctionInfo>()->getResults()) + OS << "\t" ".result " + << toString(VT) << '\n'; bool FirstVReg = true; for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) { unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx); - if (!MRI->use_empty(VReg)) { - if (FirstVReg) - OS << "\t" ".local "; - else - OS << ", "; - OS << getRegTypeName(VReg); - FirstVReg = false; - } + // FIXME: Don't skip dead virtual registers for now: that would require + // remapping all locals' numbers. + // if (!MRI->use_empty(VReg)) { + if (FirstVReg) + OS << "\t" ".local "; + else + OS << ", "; + OS << getRegTypeName(VReg); + FirstVReg = false; + //} } if (!FirstVReg) OS << '\n'; @@ -171,36 +236,80 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() { void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n'); + SmallString<128> Str; + raw_svector_ostream OS(Str); unsigned NumDefs = MI->getDesc().getNumDefs(); assert(NumDefs <= 1 && "Instructions with multiple result values not implemented"); + OS << '\t'; + switch (MI->getOpcode()) { - case TargetOpcode::COPY: { - // TODO: Figure out a way to lower COPY instructions to MCInst form. - SmallString<128> Str; - raw_svector_ostream OS(Str); - OS << "\t" "set_local " << regToString(MI->getOperand(0)) << ", " - "(get_local " << regToString(MI->getOperand(1)) << ")"; - OutStreamer->EmitRawText(OS.str()); + case TargetOpcode::COPY: + OS << "get_local push, " << regToString(MI->getOperand(1)); break; - } case WebAssembly::ARGUMENT_I32: case WebAssembly::ARGUMENT_I64: case WebAssembly::ARGUMENT_F32: case WebAssembly::ARGUMENT_F64: - // These represent values which are live into the function entry, so there's - // no instruction to emit. + OS << "get_local push, " << argToString(MI->getOperand(1)); break; default: { - WebAssemblyMCInstLower MCInstLowering(OutContext, *this); - MCInst TmpInst; - MCInstLowering.Lower(MI, TmpInst); - EmitToStreamer(*OutStreamer, TmpInst); + OS << OpcodeName(TII, MI); + bool NeedComma = false; + bool DefsPushed = false; + if (NumDefs != 0 && !MI->isCall()) { + OS << " push"; + NeedComma = true; + DefsPushed = true; + } + for (const MachineOperand &MO : MI->uses()) { + if (MO.isReg() && MO.isImplicit()) + continue; + if (NeedComma) + OS << ','; + NeedComma = true; + OS << ' '; + switch (MO.getType()) { + default: + llvm_unreachable("unexpected machine operand type"); + case MachineOperand::MO_Register: + OS << "(get_local " << regToString(MO) << ')'; + break; + case MachineOperand::MO_Immediate: + OS << MO.getImm(); + break; + case MachineOperand::MO_FPImmediate: + OS << toString(MO.getFPImm()->getValueAPF()); + break; + case MachineOperand::MO_GlobalAddress: + OS << toSymbol(MO.getGlobal()->getName()); + break; + case MachineOperand::MO_MachineBasicBlock: + OS << toSymbol(MO.getMBB()->getSymbol()->getName()); + break; + } + if (NumDefs != 0 && !DefsPushed) { + // Special-case for calls; print the push after the callee. + assert(MI->isCall()); + OS << ", push"; + DefsPushed = true; + } + } break; } } + + OutStreamer->EmitRawText(OS.str()); + + if (NumDefs != 0) { + SmallString<128> Str; + raw_svector_ostream OS(Str); + const MachineOperand &Operand = MI->getOperand(0); + OS << "\tset_local " << regToString(Operand) << ", pop"; + OutStreamer->EmitRawText(OS.str()); + } } static void ComputeLegalValueVTs(LLVMContext &Context, @@ -231,8 +340,8 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { if (Str.empty()) OS << "\t.imports\n"; - MCSymbol *Sym = OutStreamer->getContext().getOrCreateSymbol(F.getName()); - OS << "\t.import " << *Sym << " \"\" " << *Sym; + OS << "\t.import " << toSymbol(F.getName()) << " \"\" \"" << F.getName() + << "\""; const WebAssemblyTargetLowering &TLI = *TM.getSubtarget<WebAssemblySubtarget>(F).getTargetLowering(); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td index d175b6ae626..82a42f564ab 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td @@ -23,11 +23,9 @@ def : I<(outs), (ins i64imm:$amt1, i64imm:$amt2), multiclass CALL<WebAssemblyRegClass vt> { def CALL_#vt : I<(outs vt:$dst), (ins global:$callee, variable_ops), - [(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))], - "call $callee, $dst">; + [(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))]>; def CALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops), - [(set vt:$dst, (WebAssemblycall1 I32:$callee))], - "call_indirect $callee, $dst">; + [(set vt:$dst, (WebAssemblycall1 I32:$callee))]>; } let Uses = [SP32, SP64], isCall = 1 in { defm : CALL<I32>; @@ -36,11 +34,9 @@ let Uses = [SP32, SP64], isCall = 1 in { defm : CALL<F64>; def CALL_VOID : I<(outs), (ins global:$callee, variable_ops), - [(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))], - "call $callee">; + [(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))]>; def CALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops), - [(WebAssemblycall0 I32:$callee)], - "call_indirect $callee">; + [(WebAssemblycall0 I32:$callee)]>; } // Uses = [SP32,SP64], isCall = 1 /* diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td index acfd738a8fa..6aae5d38d0b 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td @@ -41,11 +41,9 @@ def BR : I<(outs), (ins bb_op:$dst), // currently. let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops), - [(WebAssemblyswitch I32:$index)], - "switch $index">; + [(WebAssemblyswitch I32:$index)]>; def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops), - [(WebAssemblyswitch I64:$index)], - "switch $index">; + [(WebAssemblyswitch I64:$index)]>; } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 // Placemarkers to indicate the start of a block or loop scope. diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp index 4226a5385ce..59acbdbe63d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp @@ -14,13 +14,11 @@ //===----------------------------------------------------------------------===// #include "WebAssemblyMCInstLower.h" -#include "WebAssemblyMachineFunctionInfo.h" #include "llvm/ADT/SmallString.h" +#include "llvm/IR/Constants.h" #include "llvm/CodeGen/AsmPrinter.h" #include "llvm/CodeGen/MachineBasicBlock.h" -#include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/IR/Constants.h" #include "llvm/MC/MCAsmInfo.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCExpr.h" @@ -57,36 +55,25 @@ void WebAssemblyMCInstLower::Lower(const MachineInstr *MI, default: MI->dump(); llvm_unreachable("unknown operand type"); - case MachineOperand::MO_Register: { + case MachineOperand::MO_Register: // Ignore all implicit register operands. if (MO.isImplicit()) continue; - // TODO: Handle physical registers. - const WebAssemblyFunctionInfo &MFI = - *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>(); - unsigned WAReg = MFI.getWAReg(MO.getReg()); - MCOp = MCOperand::createReg(WAReg); + MCOp = MCOperand::createReg(MO.getReg()); break; - } case MachineOperand::MO_Immediate: MCOp = MCOperand::createImm(MO.getImm()); break; - case MachineOperand::MO_FPImmediate: { - // TODO: MC converts all floating point immediate operands to double. - // This is fine for numeric values, but may cause NaNs to change bits. - const ConstantFP *Imm = MO.getFPImm(); - if (Imm->getType()->isFloatTy()) - MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToFloat()); - else if (Imm->getType()->isDoubleTy()) - MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToDouble()); - else - llvm_unreachable("unknown floating point immediate type"); + case MachineOperand::MO_FPImmediate: + MCOp = MCOperand::createFPImm( + MO.getFPImm()->getValueAPF().convertToDouble()); break; - } case MachineOperand::MO_MachineBasicBlock: MCOp = MCOperand::createExpr( MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx)); break; + case MachineOperand::MO_RegisterMask: + continue; case MachineOperand::MO_GlobalAddress: MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO)); break; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h index 81273c00471..bac0dfafcf3 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h @@ -30,11 +30,9 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo { std::vector<MVT> Params; std::vector<MVT> Results; - /// A mapping from CodeGen vreg index to WebAssembly register number. - std::vector<unsigned> WARegs; - public: - explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {} + explicit WebAssemblyFunctionInfo(MachineFunction &MF) + : MF(MF) {} ~WebAssemblyFunctionInfo() override; void addParam(MVT VT) { Params.push_back(VT); } @@ -42,17 +40,6 @@ public: void addResult(MVT VT) { Results.push_back(VT); } const std::vector<MVT> &getResults() const { return Results; } - - void initWARegs() { - assert(WARegs.empty()); - WARegs.resize(MF.getRegInfo().getNumVirtRegs(), -1u); - } - void setWAReg(unsigned VReg, unsigned WAReg) { - WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg; - } - unsigned getWAReg(unsigned VReg) const { - return WARegs[TargetRegisterInfo::virtReg2Index(VReg)]; - } }; } // end namespace llvm diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index 5aae7108474..99a24266686 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -175,5 +175,4 @@ void WebAssemblyPassConfig::addPreSched2() {} void WebAssemblyPassConfig::addPreEmitPass() { addPass(createWebAssemblyCFGStackify()); - addPass(createWebAssemblyRegNumbering()); } |
