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-rw-r--r--llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp5
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 9c48d32897f..367fa00ee11 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -52,6 +52,8 @@ static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID,
switch (GenericOpc) {
case TargetOpcode::G_OR:
return AArch64::ORRWrr;
+ case TargetOpcode::G_XOR:
+ return AArch64::EORWrr;
case TargetOpcode::G_AND:
return AArch64::ANDWrr;
case TargetOpcode::G_ADD:
@@ -65,6 +67,8 @@ static unsigned selectBinaryOp(unsigned GenericOpc, unsigned RegBankID,
switch (GenericOpc) {
case TargetOpcode::G_OR:
return AArch64::ORRXrr;
+ case TargetOpcode::G_XOR:
+ return AArch64::EORXrr;
case TargetOpcode::G_AND:
return AArch64::ANDXrr;
case TargetOpcode::G_ADD:
@@ -166,6 +170,7 @@ bool AArch64InstructionSelector::select(MachineInstr &I) const {
}
case TargetOpcode::G_OR:
+ case TargetOpcode::G_XOR:
case TargetOpcode::G_AND:
case TargetOpcode::G_ADD:
case TargetOpcode::G_SUB: {
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