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-rw-r--r--llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp4
-rw-r--r--llvm/lib/Target/ARM/ARMSubtarget.cpp6
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp8
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp26
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp72
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp4
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp4
7 files changed, 62 insertions, 62 deletions
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index a79d5182054..4173765499f 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3862,8 +3862,8 @@ bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {
std::tie(Arch, ExtensionString) =
getParser().parseStringToEndOfStatement().trim().split('+');
- unsigned ID = AArch64::parseArch(Arch);
- if (ID == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID))
+ AArch64::ArchKind ID = AArch64::parseArch(Arch);
+ if (ID == AArch64::ArchKind::INVALID)
return Error(ArchLoc, "unknown arch name");
if (parseToken(AsmToken::EndOfStatement))
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index c7ab87e5489..8063c1ee3c5 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -209,11 +209,11 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
if (isTargetDarwin()) {
StringRef ArchName = TargetTriple.getArchName();
- unsigned ArchKind = ARM::parseArch(ArchName);
- if (ArchKind == ARM::AK_ARMV7S)
+ ARM::ArchKind AK = ARM::parseArch(ArchName);
+ if (AK == ARM::ArchKind::ARMV7S)
// Default to the Swift CPU when targeting armv7s/thumbv7s.
CPUString = "swift";
- else if (ArchKind == ARM::AK_ARMV7K)
+ else if (AK == ARM::ArchKind::ARMV7K)
// Default to the Cortex-a7 CPU when targeting armv7k/thumbv7k.
// ARMv7k does not use SjLj exception handling.
CPUString = "cortex-a7";
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 80256bb8009..5335fa45a58 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9419,9 +9419,9 @@ void ARMAsmParser::FixModeAfterArchChange(bool WasThumb, SMLoc Loc) {
/// ::= .arch token
bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
StringRef Arch = getParser().parseStringToEndOfStatement().trim();
- unsigned ID = ARM::parseArch(Arch);
+ ARM::ArchKind ID = ARM::parseArch(Arch);
- if (ID == ARM::AK_INVALID)
+ if (ID == ARM::ArchKind::INVALID)
return Error(L, "Unknown arch name");
bool WasThumb = isThumb();
@@ -10069,9 +10069,9 @@ bool ARMAsmParser::parseDirectiveObjectArch(SMLoc L) {
SMLoc ArchLoc = Parser.getTok().getLoc();
Lex();
- unsigned ID = ARM::parseArch(Arch);
+ ARM::ArchKind ID = ARM::parseArch(Arch);
- if (ID == ARM::AK_INVALID)
+ if (ID == ARM::ArchKind::INVALID)
return Error(ArchLoc, "unknown architecture '" + Arch + "'");
if (parseToken(AsmToken::EndOfStatement))
return true;
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index a77df7a2598..97a27ece0d4 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -1127,30 +1127,30 @@ uint32_t ARMAsmBackendDarwin::generateCompactUnwindEncoding(
}
static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) {
- unsigned AK = ARM::parseArch(Arch);
+ ARM::ArchKind AK = ARM::parseArch(Arch);
switch (AK) {
default:
return MachO::CPU_SUBTYPE_ARM_V7;
- case ARM::AK_ARMV4T:
+ case ARM::ArchKind::ARMV4T:
return MachO::CPU_SUBTYPE_ARM_V4T;
- case ARM::AK_ARMV5T:
- case ARM::AK_ARMV5TE:
- case ARM::AK_ARMV5TEJ:
+ case ARM::ArchKind::ARMV5T:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::ARMV5TEJ:
return MachO::CPU_SUBTYPE_ARM_V5;
- case ARM::AK_ARMV6:
- case ARM::AK_ARMV6K:
+ case ARM::ArchKind::ARMV6:
+ case ARM::ArchKind::ARMV6K:
return MachO::CPU_SUBTYPE_ARM_V6;
- case ARM::AK_ARMV7A:
+ case ARM::ArchKind::ARMV7A:
return MachO::CPU_SUBTYPE_ARM_V7;
- case ARM::AK_ARMV7S:
+ case ARM::ArchKind::ARMV7S:
return MachO::CPU_SUBTYPE_ARM_V7S;
- case ARM::AK_ARMV7K:
+ case ARM::ArchKind::ARMV7K:
return MachO::CPU_SUBTYPE_ARM_V7K;
- case ARM::AK_ARMV6M:
+ case ARM::ArchKind::ARMV6M:
return MachO::CPU_SUBTYPE_ARM_V6M;
- case ARM::AK_ARMV7M:
+ case ARM::ArchKind::ARMV7M:
return MachO::CPU_SUBTYPE_ARM_V7M;
- case ARM::AK_ARMV7EM:
+ case ARM::ArchKind::ARMV7EM:
return MachO::CPU_SUBTYPE_ARM_V7EM;
}
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 93f4006cee8..af11fa74bba 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -92,9 +92,9 @@ class ARMTargetAsmStreamer : public ARMTargetStreamer {
void emitTextAttribute(unsigned Attribute, StringRef String) override;
void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
StringRef StringValue) override;
- void emitArch(unsigned Arch) override;
+ void emitArch(ARM::ArchKind Arch) override;
void emitArchExtension(unsigned ArchExt) override;
- void emitObjectArch(unsigned Arch) override;
+ void emitObjectArch(ARM::ArchKind Arch) override;
void emitFPU(unsigned FPU) override;
void emitInst(uint32_t Inst, char Suffix = '\0') override;
void finishAttributeSection() override;
@@ -218,7 +218,7 @@ void ARMTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute,
OS << "\n";
}
-void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
+void ARMTargetAsmStreamer::emitArch(ARM::ArchKind Arch) {
OS << "\t.arch\t" << ARM::getArchName(Arch) << "\n";
}
@@ -226,7 +226,7 @@ void ARMTargetAsmStreamer::emitArchExtension(unsigned ArchExt) {
OS << "\t.arch_extension\t" << ARM::getArchExtName(ArchExt) << "\n";
}
-void ARMTargetAsmStreamer::emitObjectArch(unsigned Arch) {
+void ARMTargetAsmStreamer::emitObjectArch(ARM::ArchKind Arch) {
OS << "\t.object_arch\t" << ARM::getArchName(Arch) << '\n';
}
@@ -303,8 +303,8 @@ private:
StringRef CurrentVendor;
unsigned FPU = ARM::FK_INVALID;
- unsigned Arch = ARM::AK_INVALID;
- unsigned EmittedArch = ARM::AK_INVALID;
+ ARM::ArchKind Arch = ARM::ArchKind::INVALID;
+ ARM::ArchKind EmittedArch = ARM::ArchKind::INVALID;
SmallVector<AttributeItem, 64> Contents;
MCSection *AttributeSection = nullptr;
@@ -404,8 +404,8 @@ private:
void emitTextAttribute(unsigned Attribute, StringRef String) override;
void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
StringRef StringValue) override;
- void emitArch(unsigned Arch) override;
- void emitObjectArch(unsigned Arch) override;
+ void emitArch(ARM::ArchKind Arch) override;
+ void emitObjectArch(ARM::ArchKind Arch) override;
void emitFPU(unsigned FPU) override;
void emitInst(uint32_t Inst, char Suffix = '\0') override;
void finishAttributeSection() override;
@@ -776,11 +776,11 @@ void ARMTargetELFStreamer::emitIntTextAttribute(unsigned Attribute,
/* OverwriteExisting= */ true);
}
-void ARMTargetELFStreamer::emitArch(unsigned Value) {
+void ARMTargetELFStreamer::emitArch(ARM::ArchKind Value) {
Arch = Value;
}
-void ARMTargetELFStreamer::emitObjectArch(unsigned Value) {
+void ARMTargetELFStreamer::emitObjectArch(ARM::ArchKind Value) {
EmittedArch = Value;
}
@@ -791,7 +791,7 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
ARM::getCPUAttr(Arch),
false);
- if (EmittedArch == ARM::AK_INVALID)
+ if (EmittedArch == ARM::ArchKind::INVALID)
setAttributeItem(CPU_arch,
ARM::getArchAttr(Arch),
false);
@@ -801,58 +801,58 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
false);
switch (Arch) {
- case ARM::AK_ARMV2:
- case ARM::AK_ARMV2A:
- case ARM::AK_ARMV3:
- case ARM::AK_ARMV3M:
- case ARM::AK_ARMV4:
+ case ARM::ArchKind::ARMV2:
+ case ARM::ArchKind::ARMV2A:
+ case ARM::ArchKind::ARMV3:
+ case ARM::ArchKind::ARMV3M:
+ case ARM::ArchKind::ARMV4:
setAttributeItem(ARM_ISA_use, Allowed, false);
break;
- case ARM::AK_ARMV4T:
- case ARM::AK_ARMV5T:
- case ARM::AK_ARMV5TE:
- case ARM::AK_ARMV6:
+ case ARM::ArchKind::ARMV4T:
+ case ARM::ArchKind::ARMV5T:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::ARMV6:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
break;
- case ARM::AK_ARMV6T2:
+ case ARM::ArchKind::ARMV6T2:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV6K:
- case ARM::AK_ARMV6KZ:
+ case ARM::ArchKind::ARMV6K:
+ case ARM::ArchKind::ARMV6KZ:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
setAttributeItem(Virtualization_use, AllowTZ, false);
break;
- case ARM::AK_ARMV6M:
+ case ARM::ArchKind::ARMV6M:
setAttributeItem(THUMB_ISA_use, Allowed, false);
break;
- case ARM::AK_ARMV7A:
+ case ARM::ArchKind::ARMV7A:
setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV7R:
+ case ARM::ArchKind::ARMV7R:
setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV7M:
+ case ARM::ArchKind::ARMV7M:
setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV8A:
- case ARM::AK_ARMV8_1A:
- case ARM::AK_ARMV8_2A:
+ case ARM::ArchKind::ARMV8A:
+ case ARM::ArchKind::ARMV8_1A:
+ case ARM::ArchKind::ARMV8_2A:
setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
@@ -860,26 +860,26 @@ void ARMTargetELFStreamer::emitArchDefaultAttributes() {
setAttributeItem(Virtualization_use, AllowTZVirtualization, false);
break;
- case ARM::AK_ARMV8MBaseline:
- case ARM::AK_ARMV8MMainline:
+ case ARM::ArchKind::ARMV8MBaseline:
+ case ARM::ArchKind::ARMV8MMainline:
setAttributeItem(THUMB_ISA_use, AllowThumbDerived, false);
setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
break;
- case ARM::AK_IWMMXT:
+ case ARM::ArchKind::IWMMXT:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
setAttributeItem(WMMX_arch, AllowWMMXv1, false);
break;
- case ARM::AK_IWMMXT2:
+ case ARM::ArchKind::IWMMXT2:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
setAttributeItem(WMMX_arch, AllowWMMXv2, false);
break;
default:
- report_fatal_error("Unknown Arch: " + Twine(Arch));
+ report_fatal_error("Unknown Arch: " + Twine(ARM::getArchName(Arch)));
break;
}
}
@@ -1057,7 +1057,7 @@ void ARMTargetELFStreamer::finishAttributeSection() {
if (FPU != ARM::FK_INVALID)
emitFPUDefaultAttributes();
- if (Arch != ARM::AK_INVALID)
+ if (Arch != ARM::ArchKind::INVALID)
emitArchDefaultAttributes();
if (Contents.empty())
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
index b8a8b1f7619..9fb6ffcd6d2 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -136,8 +136,8 @@ std::string ARM_MC::ParseARMTriple(const Triple &TT, StringRef CPU) {
std::string ARMArchFeature;
- unsigned ArchID = ARM::parseArch(TT.getArchName());
- if (ArchID != ARM::AK_INVALID && (CPU.empty() || CPU == "generic"))
+ ARM::ArchKind ArchID = ARM::parseArch(TT.getArchName());
+ if (ArchID != ARM::ArchKind::INVALID && (CPU.empty() || CPU == "generic"))
ARMArchFeature = (ARMArchFeature + "+" + ARM::getArchName(ArchID)).str();
if (isThumb) {
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
index 4a943187ab6..42371736fef 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
@@ -71,9 +71,9 @@ void ARMTargetStreamer::emitTextAttribute(unsigned Attribute,
void ARMTargetStreamer::emitIntTextAttribute(unsigned Attribute,
unsigned IntValue,
StringRef StringValue) {}
-void ARMTargetStreamer::emitArch(unsigned Arch) {}
+void ARMTargetStreamer::emitArch(ARM::ArchKind Arch) {}
void ARMTargetStreamer::emitArchExtension(unsigned ArchExt) {}
-void ARMTargetStreamer::emitObjectArch(unsigned Arch) {}
+void ARMTargetStreamer::emitObjectArch(ARM::ArchKind Arch) {}
void ARMTargetStreamer::emitFPU(unsigned FPU) {}
void ARMTargetStreamer::finishAttributeSection() {}
void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}
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