diff options
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 4 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/TargetSubtargetInfo.cpp | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index f3172a62f03..e04fe1b5a97 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -144,7 +144,7 @@ TargetPassConfig *AArch64TargetMachine::createPassConfig(PassManagerBase &PM) { void AArch64PassConfig::addIRPasses() { // Always expand atomic operations, we don't deal with atomicrmw or cmpxchg // ourselves. - addPass(createAtomicExpandLoadLinkedPass(TM)); + addPass(createAtomicExpandPass(TM)); // Cmpxchg instructions are often used with a subsequent comparison to // determine whether it succeeded. We can exploit existing control-flow in diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index 9c4f05283f2..25f2316a555 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -428,7 +428,7 @@ bool ARMSubtarget::enablePostMachineScheduler() const { return (!isThumb() || hasThumb2()); } -bool ARMSubtarget::enableAtomicExpandLoadLinked() const { +bool ARMSubtarget::enableAtomicExpand() const { return hasAnyDataBarrier() && !isThumb1Only(); } diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 1263e8b7121..8b40f2f1932 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -436,8 +436,8 @@ public: /// True for some subtargets at > -O0. bool enablePostMachineScheduler() const override; - // enableAtomicExpandLoadLinked - True if we need to expand our atomics. - bool enableAtomicExpandLoadLinked() const override; + // enableAtomicExpand- True if we need to expand our atomics. + bool enableAtomicExpand() const override; /// getInstrItins - Return the instruction itineraries based on subtarget /// selection. diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index fc164ada35f..3e5840d51b6 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -161,7 +161,7 @@ void ARMPassConfig::addIRPasses() { if (TM->Options.ThreadModel == ThreadModel::Single) addPass(createLowerAtomicPass()); else - addPass(createAtomicExpandLoadLinkedPass(TM)); + addPass(createAtomicExpandPass(TM)); // Cmpxchg instructions are often used with a subsequent comparison to // determine whether it succeeded. We can exploit existing control-flow in diff --git a/llvm/lib/Target/TargetSubtargetInfo.cpp b/llvm/lib/Target/TargetSubtargetInfo.cpp index 386a813b057..23c038fff66 100644 --- a/llvm/lib/Target/TargetSubtargetInfo.cpp +++ b/llvm/lib/Target/TargetSubtargetInfo.cpp @@ -39,7 +39,7 @@ bool TargetSubtargetInfo::useMachineScheduler() const { return enableMachineScheduler(); } -bool TargetSubtargetInfo::enableAtomicExpandLoadLinked() const { +bool TargetSubtargetInfo::enableAtomicExpand() const { return true; } |