diff options
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/TargetLoweringObjectFile.cpp | 13 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
4 files changed, 9 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 41ad069252b..23e1037baac 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -106,7 +106,7 @@ void ARMTargetLowering::addQRTypeForNEON(MVT VT) { static TargetLoweringObjectFile *createTLOF(TargetMachine &TM) { if (TM.getSubtarget<ARMSubtarget>().isTargetDarwin()) - return new TargetLoweringObjectFileMachO(TM); + return new TargetLoweringObjectFileMachO(); return new TargetLoweringObjectFileELF(true); } diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index bfe0f6f2b01..9b0dd1f7826 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -59,7 +59,7 @@ cl::desc("enable preincrement load/store generation on PPC (experimental)"), static TargetLoweringObjectFile *CreateTLOF(const PPCTargetMachine &TM) { if (TM.getSubtargetImpl()->isDarwin()) - return new TargetLoweringObjectFileMachO(TM); + return new TargetLoweringObjectFileMachO(); return new TargetLoweringObjectFileELF(false, true); } diff --git a/llvm/lib/Target/TargetLoweringObjectFile.cpp b/llvm/lib/Target/TargetLoweringObjectFile.cpp index a42911d92b9..caeac30ef8a 100644 --- a/llvm/lib/Target/TargetLoweringObjectFile.cpp +++ b/llvm/lib/Target/TargetLoweringObjectFile.cpp @@ -261,10 +261,8 @@ getOrCreateSection(const char *Name, bool isDirective, // ELF //===----------------------------------------------------------------------===// -TargetLoweringObjectFileELF::TargetLoweringObjectFileELF(bool atIsCommentChar, - bool HasCrazyBSS) - : AtIsCommentChar(atIsCommentChar) { - +void TargetLoweringObjectFileELF::Initialize(MCContext &Ctx, + const TargetMachine &TM) { if (!HasCrazyBSS) BSSSection_ = getOrCreateSection("\t.bss", true, SectionKind::BSS); else @@ -480,8 +478,8 @@ getSectionForMergeableConstant(SectionKind Kind) const { // MachO //===----------------------------------------------------------------------===// -TargetLoweringObjectFileMachO:: -TargetLoweringObjectFileMachO(const TargetMachine &TM) { +void TargetLoweringObjectFileMachO::Initialize(MCContext &Ctx, + const TargetMachine &TM) { TextSection = getOrCreateSection("\t.text", true, SectionKind::Text); DataSection = getOrCreateSection("\t.data", true, SectionKind::DataRel); @@ -592,7 +590,8 @@ getSectionForMergeableConstant(SectionKind Kind) const { // COFF //===----------------------------------------------------------------------===// -TargetLoweringObjectFileCOFF::TargetLoweringObjectFileCOFF() { +void TargetLoweringObjectFileCOFF::Initialize(MCContext &Ctx, + const TargetMachine &TM) { TextSection = getOrCreateSection("\t.text", true, SectionKind::Text); DataSection = getOrCreateSection("\t.data", true, SectionKind::DataRel); } diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index bbc6ba5e16b..70b1619425e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -55,7 +55,7 @@ static TargetLoweringObjectFile *createTLOF(X86TargetMachine &TM) { switch (TM.getSubtarget<X86Subtarget>().TargetType) { default: llvm_unreachable("unknown subtarget type"); case X86Subtarget::isDarwin: - return new TargetLoweringObjectFileMachO(TM); + return new TargetLoweringObjectFileMachO(); case X86Subtarget::isELF: return new TargetLoweringObjectFileELF(); case X86Subtarget::isMingw: |