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-rw-r--r--llvm/lib/Target/ARM/ARMInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index b01b871c6cd..4527a90b326 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -1612,7 +1612,7 @@ def Int_MemBarrierV6 : AInoP<(outs), (ins GPR:$zero),
def Int_SyncBarrierV6 : AInoP<(outs), (ins GPR:$zero),
Pseudo, NoItinerary,
- "mcr", "\tp15, 0, $zero, c7, c10, 5",
+ "mcr", "\tp15, 0, $zero, c7, c10, 4",
[(ARMSyncBarrierV6 GPR:$zero)]>,
Requires<[IsARM, HasV6]> {
// FIXME: add support for options other than a full system DSB
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