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-rw-r--r--llvm/lib/Target/TargetInstrInfo.cpp6
-rw-r--r--llvm/lib/Target/TargetSchedInfo.cpp6
2 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/TargetInstrInfo.cpp b/llvm/lib/Target/TargetInstrInfo.cpp
index a911116f7bc..115f2c2a7c3 100644
--- a/llvm/lib/Target/TargetInstrInfo.cpp
+++ b/llvm/lib/Target/TargetInstrInfo.cpp
@@ -9,6 +9,12 @@
#include "llvm/Constant.h"
#include "llvm/DerivedTypes.h"
+// External object describing the machine instructions
+// Initialized only when the TargetMachine class is created
+// and reset when that class is destroyed.
+//
+const MachineInstrDescriptor* TargetInstrDescriptors = 0;
+
//---------------------------------------------------------------------------
// class MachineInstructionInfo
// Interface to description of machine instructions
diff --git a/llvm/lib/Target/TargetSchedInfo.cpp b/llvm/lib/Target/TargetSchedInfo.cpp
index 40e822dc14b..185f01ec9e8 100644
--- a/llvm/lib/Target/TargetSchedInfo.cpp
+++ b/llvm/lib/Target/TargetSchedInfo.cpp
@@ -8,12 +8,6 @@
#include "llvm/Target/MachineSchedInfo.h"
#include "llvm/Target/TargetMachine.h"
-// External object describing the machine instructions
-// Initialized only when the TargetMachine class is created
-// and reset when that class is destroyed.
-//
-const MachineInstrDescriptor* TargetInstrDescriptors = 0;
-
resourceId_t MachineResource::nextId = 0;
// Check if fromRVec and toRVec have *any* common entries.
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