diff options
Diffstat (limited to 'llvm/lib/Target')
5 files changed, 36 insertions, 45 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index 2ea3760b923..b8ac85943eb 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -176,14 +176,14 @@ void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) { LLVM_DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n'); switch (MI->getOpcode()) { - case WebAssembly::ARGUMENT_I32: - case WebAssembly::ARGUMENT_I32_S: - case WebAssembly::ARGUMENT_I64: - case WebAssembly::ARGUMENT_I64_S: - case WebAssembly::ARGUMENT_F32: - case WebAssembly::ARGUMENT_F32_S: - case WebAssembly::ARGUMENT_F64: - case WebAssembly::ARGUMENT_F64_S: + case WebAssembly::ARGUMENT_i32: + case WebAssembly::ARGUMENT_i32_S: + case WebAssembly::ARGUMENT_i64: + case WebAssembly::ARGUMENT_i64_S: + case WebAssembly::ARGUMENT_f32: + case WebAssembly::ARGUMENT_f32_S: + case WebAssembly::ARGUMENT_f64: + case WebAssembly::ARGUMENT_f64_S: case WebAssembly::ARGUMENT_v16i8: case WebAssembly::ARGUMENT_v16i8_S: case WebAssembly::ARGUMENT_v8i16: diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp index 8dc535445d6..0be4f228347 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp @@ -646,19 +646,19 @@ bool WebAssemblyFastISel::fastLowerArguments() { case MVT::i8: case MVT::i16: case MVT::i32: - Opc = WebAssembly::ARGUMENT_I32; + Opc = WebAssembly::ARGUMENT_i32; RC = &WebAssembly::I32RegClass; break; case MVT::i64: - Opc = WebAssembly::ARGUMENT_I64; + Opc = WebAssembly::ARGUMENT_i64; RC = &WebAssembly::I64RegClass; break; case MVT::f32: - Opc = WebAssembly::ARGUMENT_F32; + Opc = WebAssembly::ARGUMENT_f32; RC = &WebAssembly::F32RegClass; break; case MVT::f64: - Opc = WebAssembly::ARGUMENT_F64; + Opc = WebAssembly::ARGUMENT_f64; RC = &WebAssembly::F64RegClass; break; case MVT::v16i8: @@ -686,7 +686,7 @@ bool WebAssemblyFastISel::fastLowerArguments() { RC = &WebAssembly::V128RegClass; break; case MVT::ExceptRef: - Opc = WebAssembly::ARGUMENT_EXCEPT_REF; + Opc = WebAssembly::ARGUMENT_ExceptRef; RC = &WebAssembly::EXCEPT_REFRegClass; break; default: diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td index 9e1409cf90e..8d98510c67d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td @@ -163,18 +163,18 @@ include "WebAssemblyInstrFormats.td" // Additional instructions. //===----------------------------------------------------------------------===// -multiclass ARGUMENT<WebAssemblyRegClass vt> { +multiclass ARGUMENT<WebAssemblyRegClass reg, ValueType vt> { let hasSideEffects = 1, isCodeGenOnly = 1, Defs = []<Register>, Uses = [ARGUMENTS] in - defm ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno), - (outs), (ins i32imm:$argno), - [(set vt:$res, (WebAssemblyargument timm:$argno))]>; + defm ARGUMENT_#vt : + I<(outs reg:$res), (ins i32imm:$argno), (outs), (ins i32imm:$argno), + [(set (vt reg:$res), (WebAssemblyargument timm:$argno))]>; } -defm "": ARGUMENT<I32>; -defm "": ARGUMENT<I64>; -defm "": ARGUMENT<F32>; -defm "": ARGUMENT<F64>; -defm "": ARGUMENT<EXCEPT_REF>; +defm "": ARGUMENT<I32, i32>; +defm "": ARGUMENT<I64, i64>; +defm "": ARGUMENT<F32, f32>; +defm "": ARGUMENT<F64, f64>; +defm "": ARGUMENT<EXCEPT_REF, ExceptRef>; // get_local and set_local are not generated by instruction selection; they // are implied by virtual register uses and defs. diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index b575a039ae0..1eb38588c81 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -21,21 +21,12 @@ multiclass SIMD_I<dag oops_r, dag iops_r, dag oops_s, dag iops_s, Requires<[HasSIMD128]>; } -multiclass SIMD_ARGUMENT<ValueType vt> { - let hasSideEffects = 1, isCodeGenOnly = 1, - Defs = []<Register>, Uses = [ARGUMENTS] in - defm ARGUMENT_#vt : SIMD_I<(outs V128:$res), (ins i32imm:$argno), - (outs), (ins i32imm:$argno), - [(set (vt V128:$res), - (WebAssemblyargument timm:$argno))]>; -} - -defm "": SIMD_ARGUMENT<v16i8>; -defm "": SIMD_ARGUMENT<v8i16>; -defm "": SIMD_ARGUMENT<v4i32>; -defm "": SIMD_ARGUMENT<v2i64>; -defm "": SIMD_ARGUMENT<v4f32>; -defm "": SIMD_ARGUMENT<v2f64>; +defm "" : ARGUMENT<V128, v16i8>; +defm "" : ARGUMENT<V128, v8i16>; +defm "" : ARGUMENT<V128, v4i32>; +defm "" : ARGUMENT<V128, v2i64>; +defm "" : ARGUMENT<V128, v4f32>; +defm "" : ARGUMENT<V128, v2f64>; // Constrained immediate argument types foreach SIZE = [8, 16] in diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp index a25ec7cf4c2..ada6fb9a96d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp @@ -27,14 +27,14 @@ const char *const WebAssembly::PersonalityWrapperFn = bool WebAssembly::isArgument(const MachineInstr &MI) { switch (MI.getOpcode()) { - case WebAssembly::ARGUMENT_I32: - case WebAssembly::ARGUMENT_I32_S: - case WebAssembly::ARGUMENT_I64: - case WebAssembly::ARGUMENT_I64_S: - case WebAssembly::ARGUMENT_F32: - case WebAssembly::ARGUMENT_F32_S: - case WebAssembly::ARGUMENT_F64: - case WebAssembly::ARGUMENT_F64_S: + case WebAssembly::ARGUMENT_i32: + case WebAssembly::ARGUMENT_i32_S: + case WebAssembly::ARGUMENT_i64: + case WebAssembly::ARGUMENT_i64_S: + case WebAssembly::ARGUMENT_f32: + case WebAssembly::ARGUMENT_f32_S: + case WebAssembly::ARGUMENT_f64: + case WebAssembly::ARGUMENT_f64_S: case WebAssembly::ARGUMENT_v16i8: case WebAssembly::ARGUMENT_v16i8_S: case WebAssembly::ARGUMENT_v8i16: |
