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-rw-r--r--llvm/lib/Target/ARM/ARMAsmBackend.cpp13
-rw-r--r--llvm/lib/Target/PowerPC/PPCAsmBackend.cpp16
-rw-r--r--llvm/lib/Target/X86/X86AsmBackend.cpp24
3 files changed, 33 insertions, 20 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/ARMAsmBackend.cpp
index 9556a7d9e32..db7e20cfc01 100644
--- a/llvm/lib/Target/ARM/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmBackend.cpp
@@ -29,6 +29,10 @@ using namespace llvm;
namespace {
class ARMMachObjectWriter : public MCMachObjectTargetWriter {
+public:
+ ARMMachObjectWriter(bool Is64Bit, uint32_t CPUType,
+ uint32_t CPUSubtype)
+ : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
};
class ARMAsmBackend : public TargetAsmBackend {
@@ -385,10 +389,11 @@ public:
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
// FIXME: Subtarget info should be derived. Force v7 for now.
- return createMachObjectWriter(new ARMMachObjectWriter,
- OS, /*Is64Bit=*/false,
- object::mach::CTM_ARM,
- object::mach::CSARM_V7,
+ return createMachObjectWriter(new ARMMachObjectWriter(
+ /*Is64Bit=*/false,
+ object::mach::CTM_ARM,
+ object::mach::CSARM_V7),
+ OS,
/*IsLittleEndian=*/true);
}
diff --git a/llvm/lib/Target/PowerPC/PPCAsmBackend.cpp b/llvm/lib/Target/PowerPC/PPCAsmBackend.cpp
index d8ab689bfa7..bf437e3aded 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmBackend.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmBackend.cpp
@@ -20,6 +20,10 @@ using namespace llvm;
namespace {
class PPCMachObjectWriter : public MCMachObjectTargetWriter {
+public:
+ PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
+ uint32_t CPUSubtype)
+ : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
};
class PPCAsmBackend : public TargetAsmBackend {
@@ -95,12 +99,12 @@ namespace {
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
bool is64 = getPointerSize() == 8;
- return createMachObjectWriter(new PPCMachObjectWriter,
- OS, /*Is64Bit=*/is64,
- (is64 ? object::mach::CTM_PowerPC64 :
- object::mach::CTM_PowerPC),
- object::mach::CSPPC_ALL,
- /*IsLittleEndian=*/false);
+ return createMachObjectWriter(new PPCMachObjectWriter(
+ /*Is64Bit=*/is64,
+ (is64 ? object::mach::CTM_PowerPC64 :
+ object::mach::CTM_PowerPC),
+ object::mach::CSPPC_ALL),
+ OS, /*IsLittleEndian=*/false);
}
virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
diff --git a/llvm/lib/Target/X86/X86AsmBackend.cpp b/llvm/lib/Target/X86/X86AsmBackend.cpp
index 3c1c4592dcb..d137875e2cf 100644
--- a/llvm/lib/Target/X86/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/X86AsmBackend.cpp
@@ -47,6 +47,10 @@ static unsigned getFixupKindLog2Size(unsigned Kind) {
namespace {
class X86MachObjectWriter : public MCMachObjectTargetWriter {
+public:
+ X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
+ uint32_t CPUSubtype)
+ : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
};
class X86AsmBackend : public TargetAsmBackend {
@@ -365,11 +369,11 @@ public:
: DarwinX86AsmBackend(T) {}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
- return createMachObjectWriter(new X86MachObjectWriter,
- OS, /*Is64Bit=*/false,
- object::mach::CTM_i386,
- object::mach::CSX86_ALL,
- /*IsLittleEndian=*/true);
+ return createMachObjectWriter(new X86MachObjectWriter(
+ /*Is64Bit=*/false,
+ object::mach::CTM_i386,
+ object::mach::CSX86_ALL),
+ OS, /*IsLittleEndian=*/true);
}
};
@@ -381,11 +385,11 @@ public:
}
MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
- return createMachObjectWriter(new X86MachObjectWriter,
- OS, /*Is64Bit=*/true,
- object::mach::CTM_x86_64,
- object::mach::CSX86_ALL,
- /*IsLittleEndian=*/true);
+ return createMachObjectWriter(new X86MachObjectWriter(
+ /*Is64Bit=*/true,
+ object::mach::CTM_x86_64,
+ object::mach::CSX86_ALL),
+ OS, /*IsLittleEndian=*/true);
}
virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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