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-rw-r--r--llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp2
-rw-r--r--llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp1
2 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
index e334a2d23f3..44da72b0125 100644
--- a/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
@@ -143,7 +143,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST) {
[=](const LegalityQuery &Query) { return std::make_pair(0, s32); })
.legalFor({s16, s32, s64, v2s32, v4s32, v2s64, v2s16, v4s16, v8s16});
- getActionDefinitionsBuilder({G_FCOS, G_FSIN, G_FLOG10, G_FLOG})
+ getActionDefinitionsBuilder({G_FCOS, G_FSIN, G_FLOG10, G_FLOG, G_FLOG2})
// We need a call for these, so we always need to scalarize.
.scalarize(0)
// Regardless of FP16 support, widen 16-bit elements to 32-bits.
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
index 256a4839fae..a4cd60322db 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
@@ -397,6 +397,7 @@ static bool isPreISelGenericFloatingPointOpcode(unsigned Opc) {
case TargetOpcode::G_FSIN:
case TargetOpcode::G_FLOG10:
case TargetOpcode::G_FLOG:
+ case TargetOpcode::G_FLOG2:
case TargetOpcode::G_FSQRT:
return true;
}
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