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-rw-r--r--llvm/lib/Target/XCore/XCoreTargetMachine.cpp18
1 files changed, 12 insertions, 6 deletions
diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
index 7fc869495a9..42b98753ecf 100644
--- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
+++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -26,10 +26,9 @@ using namespace llvm;
extern "C" int XCoreTargetMachineModule;
int XCoreTargetMachineModule = 0;
-extern Target TheXCoreTarget;
namespace {
// Register the target.
- RegisterTarget<XCoreTargetMachine> X(TheXCoreTarget, "xcore", "XCore");
+ RegisterTarget<XCoreTargetMachine> X("xcore", "XCore");
}
// Force static initialization.
@@ -41,10 +40,8 @@ const TargetAsmInfo *XCoreTargetMachine::createTargetAsmInfo() const {
/// XCoreTargetMachine ctor - Create an ILP32 architecture model
///
-XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Module &M,
- const std::string &FS)
- : LLVMTargetMachine(T),
- Subtarget(*this, M, FS),
+XCoreTargetMachine::XCoreTargetMachine(const Module &M, const std::string &FS)
+ : Subtarget(*this, M, FS),
DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
"i16:16:32-i32:32:32-i64:32:32"),
InstrInfo(),
@@ -52,6 +49,15 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Module &M,
TLInfo(*this) {
}
+unsigned XCoreTargetMachine::getModuleMatchQuality(const Module &M) {
+ std::string TT = M.getTargetTriple();
+ if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "xcore-")
+ return 20;
+
+ // Otherwise we don't match.
+ return 0;
+}
+
bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
PM.add(createXCoreISelDag(*this));
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