diff options
Diffstat (limited to 'llvm/lib/Target/X86')
5 files changed, 31 insertions, 31 deletions
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp index 13db75d7723..85ab2ef58f4 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp @@ -261,13 +261,13 @@ protected: MCContext &Ctx, int64_t *Residue); bool is64BitMode() const { - return STI.getFeatureBits()[X86::Mode64Bit]; + return (STI.getFeatureBits() & X86::Mode64Bit) != 0; } bool is32BitMode() const { - return STI.getFeatureBits()[X86::Mode32Bit]; + return (STI.getFeatureBits() & X86::Mode32Bit) != 0; } bool is16BitMode() const { - return STI.getFeatureBits()[X86::Mode16Bit]; + return (STI.getFeatureBits() & X86::Mode16Bit) != 0; } unsigned getPointerWidth() { @@ -1072,9 +1072,9 @@ CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions, const bool hasCompilerRTSupport = T.isOSLinux(); if (ClAsanInstrumentAssembly && hasCompilerRTSupport && MCOptions.SanitizeAddress) { - if (STI.getFeatureBits()[X86::Mode32Bit] != 0) + if ((STI.getFeatureBits() & X86::Mode32Bit) != 0) return new X86AddressSanitizer32(STI); - if (STI.getFeatureBits()[X86::Mode64Bit] != 0) + if ((STI.getFeatureBits() & X86::Mode64Bit) != 0) return new X86AddressSanitizer64(STI); } return new X86AsmInstrumentation(STI); diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index d28d69d2758..244a94e9aa7 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -729,24 +729,23 @@ private: bool is64BitMode() const { // FIXME: Can tablegen auto-generate this? - return STI.getFeatureBits()[X86::Mode64Bit]; + return (STI.getFeatureBits() & X86::Mode64Bit) != 0; } bool is32BitMode() const { // FIXME: Can tablegen auto-generate this? - return STI.getFeatureBits()[X86::Mode32Bit]; + return (STI.getFeatureBits() & X86::Mode32Bit) != 0; } bool is16BitMode() const { // FIXME: Can tablegen auto-generate this? - return STI.getFeatureBits()[X86::Mode16Bit]; + return (STI.getFeatureBits() & X86::Mode16Bit) != 0; } - void SwitchMode(unsigned mode) { - FeatureBitset AllModes({X86::Mode64Bit, X86::Mode32Bit, X86::Mode16Bit}); - FeatureBitset OldMode = STI.getFeatureBits() & AllModes; - unsigned FB = ComputeAvailableFeatures( - STI.ToggleFeature(OldMode.flip(mode))); + void SwitchMode(uint64_t mode) { + uint64_t oldMode = STI.getFeatureBits() & + (X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit); + unsigned FB = ComputeAvailableFeatures(STI.ToggleFeature(oldMode | mode)); setAvailableFeatures(FB); - - assert(FeatureBitset({mode}) == (STI.getFeatureBits() & AllModes)); + assert(mode == (STI.getFeatureBits() & + (X86::Mode64Bit | X86::Mode32Bit | X86::Mode16Bit))); } unsigned getPointerWidth() { @@ -1697,7 +1696,7 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseIntelOperand() { } // rounding mode token - if (STI.getFeatureBits()[X86::FeatureAVX512] && + if (STI.getFeatureBits() & X86::FeatureAVX512 && getLexer().is(AsmToken::LCurly)) return ParseRoundingModeOp(Start, End); @@ -1755,7 +1754,7 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseATTOperand() { } case AsmToken::LCurly:{ SMLoc Start = Parser.getTok().getLoc(), End; - if (STI.getFeatureBits()[X86::FeatureAVX512]) + if (STI.getFeatureBits() & X86::FeatureAVX512) return ParseRoundingModeOp(Start, End); return ErrorOperand(Start, "unknown token in expression"); } @@ -1765,7 +1764,7 @@ std::unique_ptr<X86Operand> X86AsmParser::ParseATTOperand() { bool X86AsmParser::HandleAVX512Operand(OperandVector &Operands, const MCParsedAsmOperand &Op) { MCAsmParser &Parser = getParser(); - if(STI.getFeatureBits()[X86::FeatureAVX512]) { + if(STI.getFeatureBits() & X86::FeatureAVX512) { if (getLexer().is(AsmToken::LCurly)) { // Eat "{" and mark the current place. const SMLoc consumedToken = consumeToken(); diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index 46a6b3c8b2e..e8c547517b0 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -80,19 +80,20 @@ X86GenericDisassembler::X86GenericDisassembler( MCContext &Ctx, std::unique_ptr<const MCInstrInfo> MII) : MCDisassembler(STI, Ctx), MII(std::move(MII)) { - const FeatureBitset &FB = STI.getFeatureBits(); - if (FB[X86::Mode16Bit]) { + switch (STI.getFeatureBits() & + (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) { + case X86::Mode16Bit: fMode = MODE_16BIT; - return; - } else if (FB[X86::Mode32Bit]) { + break; + case X86::Mode32Bit: fMode = MODE_32BIT; - return; - } else if (FB[X86::Mode64Bit]) { + break; + case X86::Mode64Bit: fMode = MODE_64BIT; - return; + break; + default: + llvm_unreachable("Invalid CPU mode"); } - - llvm_unreachable("Invalid CPU mode"); } struct Region { diff --git a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp index e0b6c50415b..f265f1dee9d 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp +++ b/llvm/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp @@ -57,7 +57,7 @@ void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, // InstrInfo.td as soon as Requires clause is supported properly // for InstAlias. if (MI->getOpcode() == X86::CALLpcrel32 && - (STI.getFeatureBits()[X86::Mode64Bit])) { + (STI.getFeatureBits() & X86::Mode64Bit) != 0) { OS << "\tcallq\t"; printPCRelImm(MI, 0, OS); } diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 81fc3cb6ab8..e27b7cb5946 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -42,15 +42,15 @@ public: ~X86MCCodeEmitter() override {} bool is64BitMode(const MCSubtargetInfo &STI) const { - return STI.getFeatureBits()[X86::Mode64Bit]; + return (STI.getFeatureBits() & X86::Mode64Bit) != 0; } bool is32BitMode(const MCSubtargetInfo &STI) const { - return STI.getFeatureBits()[X86::Mode32Bit]; + return (STI.getFeatureBits() & X86::Mode32Bit) != 0; } bool is16BitMode(const MCSubtargetInfo &STI) const { - return STI.getFeatureBits()[X86::Mode16Bit]; + return (STI.getFeatureBits() & X86::Mode16Bit) != 0; } /// Is16BitMemOperand - Return true if the specified instruction has |