diff options
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp | 37 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/Utils/X86ShuffleDecode.h | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
4 files changed, 30 insertions, 26 deletions
diff --git a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp index 61a93306258..98c3a03dfe9 100644 --- a/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp +++ b/llvm/lib/Target/X86/InstPrinter/X86InstComments.cpp @@ -127,6 +127,11 @@ using namespace llvm; CASE_MASKZ_INS_COMMON(Inst, Z256, src##i) \ CASE_MASKZ_INS_COMMON(Inst, Z128, src##i) +#define CASE_VPERM(Inst, src) \ + CASE_AVX512_INS_COMMON(Inst, Z, src##i) \ + CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \ + CASE_AVX_INS_COMMON(Inst, Y, src##i) + #define CASE_VSHUF(Inst, src) \ CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i) \ CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i) \ @@ -826,26 +831,24 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, DestName = getRegName(MI->getOperand(0).getReg()); break; - case X86::VPERMQYri: - case X86::VPERMQZ256ri: - case X86::VPERMQZ256rik: - case X86::VPERMQZ256rikz: - case X86::VPERMPDYri: - case X86::VPERMPDZ256ri: - case X86::VPERMPDZ256rik: - case X86::VPERMPDZ256rikz: + CASE_VPERM(PERMPD, r) Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); // FALL THROUGH. - case X86::VPERMQYmi: - case X86::VPERMQZ256mi: - case X86::VPERMQZ256mik: - case X86::VPERMQZ256mikz: - case X86::VPERMPDYmi: - case X86::VPERMPDZ256mi: - case X86::VPERMPDZ256mik: - case X86::VPERMPDZ256mikz: + CASE_VPERM(PERMPD, m) if (MI->getOperand(NumOperands - 1).isImm()) - DecodeVPERMMask(MI->getOperand(NumOperands - 1).getImm(), + DecodeVPERMMask(getRegOperandVectorVT(MI, MVT::f64, 0), + MI->getOperand(NumOperands - 1).getImm(), + ShuffleMask); + DestName = getRegName(MI->getOperand(0).getReg()); + break; + + CASE_VPERM(PERMQ, r) + Src1Name = getRegName(MI->getOperand(NumOperands - 2).getReg()); + // FALL THROUGH. + CASE_VPERM(PERMQ, m) + if (MI->getOperand(NumOperands - 1).isImm()) + DecodeVPERMMask(getRegOperandVectorVT(MI, MVT::i64, 0), + MI->getOperand(NumOperands - 1).getImm(), ShuffleMask); DestName = getRegName(MI->getOperand(0).getReg()); break; diff --git a/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp b/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp index 899080afd62..713595dbbc1 100644 --- a/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp +++ b/llvm/lib/Target/X86/Utils/X86ShuffleDecode.cpp @@ -382,12 +382,14 @@ void DecodeVPPERMMask(ArrayRef<uint64_t> RawMask, } } - /// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD. -/// No VT provided since it only works on 256-bit, 4 element vectors. -void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { - for (unsigned i = 0; i != 4; ++i) { - ShuffleMask.push_back((Imm >> (2 * i)) & 3); - } +/// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD. +void DecodeVPERMMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { + assert((VT.is256BitVector() || VT.is512BitVector()) && + (VT.getScalarSizeInBits() == 64) && "Unexpected vector value type"); + unsigned NumElts = VT.getVectorNumElements(); + for (unsigned l = 0; l != NumElts; l += 4) + for (unsigned i = 0; i != 4; ++i) + ShuffleMask.push_back(l + ((Imm >> (2 * i)) & 3)); } void DecodeZeroExtendMask(MVT SrcScalarVT, MVT DstVT, SmallVectorImpl<int> &Mask) { diff --git a/llvm/lib/Target/X86/Utils/X86ShuffleDecode.h b/llvm/lib/Target/X86/Utils/X86ShuffleDecode.h index f1caa56fc1a..7caccefc0a8 100644 --- a/llvm/lib/Target/X86/Utils/X86ShuffleDecode.h +++ b/llvm/lib/Target/X86/Utils/X86ShuffleDecode.h @@ -105,8 +105,7 @@ void decodeVSHUF64x2FamilyMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); /// Decodes the shuffle masks for VPERMQ/VPERMPD. -/// No VT provided since it only works on 256-bit, 4 element vectors. -void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask); +void DecodeVPERMMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask); /// Decode a VPPERM mask from a raw array of constants such as from /// BUILD_VECTOR. diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9c02303ed11..34f6f23d7e8 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4940,7 +4940,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero, } case X86ISD::VPERMI: ImmN = N->getOperand(N->getNumOperands()-1); - DecodeVPERMMask(cast<ConstantSDNode>(ImmN)->getZExtValue(), Mask); + DecodeVPERMMask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(), Mask); IsUnary = true; break; case X86ISD::MOVSS: |
