diff options
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 18c5f60f2f2..1411cf18902 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -23004,22 +23004,21 @@ static SDValue LowerCTTZ(SDValue Op, const X86Subtarget &Subtarget, if (VT.is256BitVector() && !Subtarget.hasInt256()) return Lower256IntUnary(Op, DAG); - // Tmp = ~x & (x - 1) - SDValue One = DAG.getConstant(1, dl, VT); - SDValue Tmp = DAG.getNode(ISD::AND, dl, VT, DAG.getNOT(dl, N0, VT), - DAG.getNode(ISD::SUB, dl, VT, N0, One)); - // cttz(x) = width - ctlz(~x & (x - 1)) const TargetLowering &TLI = DAG.getTargetLoweringInfo(); if (TLI.isOperationLegal(ISD::CTLZ, VT) && !TLI.isOperationLegal(ISD::CTPOP, VT)) { + SDValue One = DAG.getConstant(1, dl, VT); SDValue Width = DAG.getConstant(NumBits, dl, VT); - return DAG.getNode(ISD::SUB, dl, VT, Width, - DAG.getNode(ISD::CTLZ, dl, VT, Tmp)); + return DAG.getNode( + ISD::SUB, dl, VT, Width, + DAG.getNode(ISD::CTLZ, dl, VT, + DAG.getNode(ISD::AND, dl, VT, DAG.getNOT(dl, N0, VT), + DAG.getNode(ISD::SUB, dl, VT, N0, One)))); } - // cttz(x) = ctpop(~x & (x - 1)) - return DAG.getNode(ISD::CTPOP, dl, VT, Tmp); + // Else leave it to the legalizer. + return SDValue(); } assert(Op.getOpcode() == ISD::CTTZ && |
