diff options
Diffstat (limited to 'llvm/lib/Target/X86')
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedBroadwell.td | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSandyBridge.td | 18 | ||||
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedSkylakeServer.td | 22 |
3 files changed, 8 insertions, 38 deletions
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td index 3903095ae67..4f2655dbe40 100755 --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -1695,11 +1695,7 @@ def: InstRW<[BWWriteResGroup115], (instregex "MMX_PMADDUBSWrm", "(V?)PHMINPOSUWrm", "(V?)PMADDUBSWrm", "(V?)PMADDWDrm", - "(V?)PSADBWrm", - "(V?)RCPPSm", - "(V?)RCPSSm", - "(V?)RSQRTPSm", - "(V?)RSQRTSSm")>; + "(V?)PSADBWrm")>; def BWWriteResGroup116 : SchedWriteRes<[BWPort01,BWPort23]> { let Latency = 10; diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index 38990797795..c4dd583d409 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -141,10 +141,10 @@ def : WriteRes<WriteFMove, [SBPort5]>; defm : SBWriteResPair<WriteFAdd, [SBPort1], 3>; defm : SBWriteResPair<WriteFCmp, [SBPort1], 3, [1], 1, 6>; defm : SBWriteResPair<WriteFCom, [SBPort1], 3>; -defm : SBWriteResPair<WriteFMul, [SBPort0], 5>; +defm : SBWriteResPair<WriteFMul, [SBPort0], 5, [1], 1, 6>; defm : SBWriteResPair<WriteFDiv, [SBPort0], 24>; -defm : SBWriteResPair<WriteFRcp, [SBPort0], 5>; -defm : SBWriteResPair<WriteFRsqrt, [SBPort0], 5>; +defm : SBWriteResPair<WriteFRcp, [SBPort0], 5, [1], 1, 6>; +defm : SBWriteResPair<WriteFRsqrt, [SBPort0], 5, [1], 1, 6>; defm : SBWriteResPair<WriteFSqrt, [SBPort0], 14>; defm : SBWriteResPair<WriteCvtF2I, [SBPort1], 3>; defm : SBWriteResPair<WriteCvtI2F, [SBPort1], 4>; @@ -1561,16 +1561,8 @@ def SBWriteResGroup104 : SchedWriteRes<[SBPort0,SBPort23]> { let NumMicroOps = 2; let ResourceCycles = [1,1]; } -def: InstRW<[SBWriteResGroup104], (instregex "(V?)MULPDrm", - "(V?)MULPSrm", - "(V?)MULSDrm", - "(V?)MULSSrm", - "(V?)PCMPGTQrm", - "(V?)PHMINPOSUWrm", - "(V?)RCPPSm", - "(V?)RCPSSm", - "(V?)RSQRTPSm", - "(V?)RSQRTSSm")>; +def: InstRW<[SBWriteResGroup104], (instregex "(V?)PCMPGTQrm", + "(V?)PHMINPOSUWrm")>; def SBWriteResGroup106 : SchedWriteRes<[SBPort1,SBPort23]> { let Latency = 11; diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index 40b24c7a72c..561e4ebea99 100755 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -157,8 +157,8 @@ defm : SKXWriteResPair<WriteFCom, [SKXPort0], 2>; // Floating point compare to defm : SKXWriteResPair<WriteFMul, [SKXPort0], 5>; // Floating point multiplication. defm : SKXWriteResPair<WriteFDiv, [SKXPort0], 12>; // 10-14 cycles. // Floating point division. defm : SKXWriteResPair<WriteFSqrt, [SKXPort0], 15>; // Floating point square root. -defm : SKXWriteResPair<WriteFRcp, [SKXPort0], 4>; // Floating point reciprocal estimate. -defm : SKXWriteResPair<WriteFRsqrt, [SKXPort0], 4>; // Floating point reciprocal square root estimate. +defm : SKXWriteResPair<WriteFRcp, [SKXPort0], 4, [1], 1, 6>; // Floating point reciprocal estimate. +defm : SKXWriteResPair<WriteFRsqrt, [SKXPort0], 4, [1], 1, 6>; // Floating point reciprocal square root estimate. defm : SKXWriteResPair<WriteFMA, [SKXPort015], 4>; // Fused Multiply Add. defm : SKXWriteResPair<WriteFSign, [SKXPort0], 1>; // Floating point fabs/fchs. defm : SKXWriteResPair<WriteFLogic, [SKXPort015], 1, [1], 1, 6>; // Floating point and/or/xor logicals. @@ -3820,24 +3820,6 @@ def SKXWriteResGroup146 : SchedWriteRes<[SKXPort1,SKXPort6,SKXPort23,SKXPort0156 def: InstRW<[SKXWriteResGroup146], (instregex "LAR(16|32|64)rm", "LSL(16|32|64)rm")>; -def SKXWriteResGroup147 : SchedWriteRes<[SKXPort0,SKXPort23]> { - let Latency = 10; - let NumMicroOps = 2; - let ResourceCycles = [1,1]; -} -def: InstRW<[SKXWriteResGroup147], (instregex "RCPPSm", - "RSQRTPSm", - "VRCP14PDZ128m(b?)", - "VRCP14PSZ128m(b?)", - "VRCP14SDrm(b?)", - "VRCP14SSrm(b?)", - "VRCPPSm", - "VRSQRT14PDZ128m(b?)", - "VRSQRT14PSZ128m(b?)", - "VRSQRT14SDrm(b?)", - "VRSQRT14SSrm(b?)", - "VRSQRTPSm")>; - def SKXWriteResGroup148 : SchedWriteRes<[SKXPort5,SKXPort23]> { let Latency = 10; let NumMicroOps = 2; |
