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-rw-r--r--llvm/lib/Target/X86/X86TargetTransformInfo.cpp7
1 files changed, 0 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 57dcef20896..90adb3a4146 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -146,13 +146,6 @@ unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) const {
return 32;
}
-// Use horizontal 128-bit operations, which use low and high
-// 64-bit parts of vector register. This also allows vectorizer
-// to use partial vector operations.
-unsigned X86TTIImpl::getMinVectorRegisterBitWidth() const {
- return 64;
-}
-
unsigned X86TTIImpl::getLoadStoreVecRegBitWidth(unsigned) const {
return getRegisterBitWidth(true);
}
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