diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetMachine.cpp | 61 |
1 files changed, 44 insertions, 17 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index 5af02d0bf60..7dd878e8a90 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -11,23 +11,39 @@ // //===----------------------------------------------------------------------===// -#include "X86TargetMachine.h" +#include "MCTargetDesc/X86MCTargetDesc.h" #include "X86.h" #include "X86CallLowering.h" #include "X86MacroFusion.h" +#include "X86Subtarget.h" +#include "X86TargetMachine.h" #include "X86TargetObjectFile.h" #include "X86TargetTransformInfo.h" +#include "llvm/ADT/Optional.h" +#include "llvm/ADT/SmallString.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/ADT/Triple.h" +#include "llvm/Analysis/TargetTransformInfo.h" +#include "llvm/CodeGen/GlobalISel/CallLowering.h" #include "llvm/CodeGen/GlobalISel/GISelAccessor.h" #include "llvm/CodeGen/GlobalISel/IRTranslator.h" #include "llvm/CodeGen/MachineScheduler.h" #include "llvm/CodeGen/Passes.h" #include "llvm/CodeGen/TargetPassConfig.h" +#include "llvm/IR/Attributes.h" +#include "llvm/IR/DataLayout.h" #include "llvm/IR/Function.h" -#include "llvm/IR/LegacyPassManager.h" +#include "llvm/Pass.h" +#include "llvm/Support/CodeGen.h" #include "llvm/Support/CommandLine.h" -#include "llvm/Support/FormattedStream.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/TargetRegistry.h" +#include "llvm/Target/TargetLoweringObjectFile.h" #include "llvm/Target/TargetOptions.h" +#include <memory> +#include <string> + using namespace llvm; static cl::opt<bool> EnableMachineCombinerPass("x86-machine-combiner", @@ -35,8 +51,10 @@ static cl::opt<bool> EnableMachineCombinerPass("x86-machine-combiner", cl::init(true), cl::Hidden); namespace llvm { + void initializeWinEHStatePassPass(PassRegistry &); -} + +} // end namespace llvm extern "C" void LLVMInitializeX86Target() { // Register the target. @@ -53,22 +71,22 @@ extern "C" void LLVMInitializeX86Target() { static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { if (TT.isOSBinFormatMachO()) { if (TT.getArch() == Triple::x86_64) - return make_unique<X86_64MachoTargetObjectFile>(); - return make_unique<TargetLoweringObjectFileMachO>(); + return llvm::make_unique<X86_64MachoTargetObjectFile>(); + return llvm::make_unique<TargetLoweringObjectFileMachO>(); } if (TT.isOSFreeBSD()) - return make_unique<X86FreeBSDTargetObjectFile>(); + return llvm::make_unique<X86FreeBSDTargetObjectFile>(); if (TT.isOSLinux() || TT.isOSNaCl()) - return make_unique<X86LinuxNaClTargetObjectFile>(); + return llvm::make_unique<X86LinuxNaClTargetObjectFile>(); if (TT.isOSFuchsia()) - return make_unique<X86FuchsiaTargetObjectFile>(); + return llvm::make_unique<X86FuchsiaTargetObjectFile>(); if (TT.isOSBinFormatELF()) - return make_unique<X86ELFTargetObjectFile>(); + return llvm::make_unique<X86ELFTargetObjectFile>(); if (TT.isKnownWindowsMSVCEnvironment() || TT.isWindowsCoreCLREnvironment()) - return make_unique<X86WindowsTargetObjectFile>(); + return llvm::make_unique<X86WindowsTargetObjectFile>(); if (TT.isOSBinFormatCOFF()) - return make_unique<TargetLoweringObjectFileCOFF>(); + return llvm::make_unique<TargetLoweringObjectFileCOFF>(); llvm_unreachable("unknown subtarget type"); } @@ -178,31 +196,39 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT, initAsmInfo(); } -X86TargetMachine::~X86TargetMachine() {} +X86TargetMachine::~X86TargetMachine() = default; #ifdef LLVM_BUILD_GLOBAL_ISEL namespace { + struct X86GISelActualAccessor : public GISelAccessor { std::unique_ptr<CallLowering> CL; + X86GISelActualAccessor(CallLowering* CL): CL(CL) {} + const CallLowering *getCallLowering() const override { return CL.get(); } + const InstructionSelector *getInstructionSelector() const override { //TODO: Implement return nullptr; } + const LegalizerInfo *getLegalizerInfo() const override { //TODO: Implement return nullptr; } + const RegisterBankInfo *getRegBankInfo() const override { //TODO: Implement return nullptr; } }; -} // End anonymous namespace. + +} // end anonymous namespace #endif + const X86Subtarget * X86TargetMachine::getSubtargetImpl(const Function &F) const { Attribute CPUAttr = F.getFnAttribute("target-cpu"); @@ -271,12 +297,12 @@ TargetIRAnalysis X86TargetMachine::getTargetIRAnalysis() { }); } - //===----------------------------------------------------------------------===// // Pass Pipeline Configuration //===----------------------------------------------------------------------===// namespace { + /// X86 Code Generator Pass Configuration Options. class X86PassConfig : public TargetPassConfig { public: @@ -302,14 +328,15 @@ public: bool addRegBankSelect() override; bool addGlobalInstructionSelect() override; #endif -bool addILPOpts() override; + bool addILPOpts() override; bool addPreISel() override; void addPreRegAlloc() override; void addPostRegAlloc() override; void addPreEmitPass() override; void addPreSched2() override; }; -} // namespace + +} // end anonymous namespace TargetPassConfig *X86TargetMachine::createPassConfig(PassManagerBase &PM) { return new X86PassConfig(this, PM); |