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-rw-r--r--llvm/lib/Target/X86/X86TargetMachine.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 51ba378135d..1a9e978dc4a 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -25,6 +25,8 @@
#include "Support/Statistic.h"
using namespace llvm;
+X86VectorEnum llvm::X86Vector = NoSSE;
+
namespace {
cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true),
cl::desc("Disable the ssa-based peephole optimizer "
@@ -33,6 +35,18 @@ namespace {
cl::desc("Disable the X86 asm printer, for use "
"when profiling the code generator."));
+ // FIXME: This should eventually be handled with target triples and
+ // subtarget support!
+ cl::opt<X86VectorEnum, true>
+ SSEArg(
+ cl::desc("Enable SSE support in the X86 target:"),
+ cl::values(
+ clEnumValN(SSE, "sse", " Enable SSE support"),
+ clEnumValN(SSE2, "sse2", " Enable SSE and SSE2 support"),
+ clEnumValN(SSE3, "sse3", " Enable SSE, SSE2, and SSE3 support"),
+ clEnumValEnd),
+ cl::location(X86Vector), cl::init(NoSSE));
+
// Register the target.
RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)");
}
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