diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedHaswell.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedHaswell.td | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index 35beb5a5730..f3a9a11e625 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -980,12 +980,12 @@ def: InstRW<[HWWriteResGroup4], (instregex "MOVDDUPrr")>; def: InstRW<[HWWriteResGroup4], (instregex "MOVDI2PDIrr")>; def: InstRW<[HWWriteResGroup4], (instregex "MOVHLPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "MOVLHPSrr")>; -def: InstRW<[HWWriteResGroup4], (instregex "MOVSDrr(_REV)?")>; +def: InstRW<[HWWriteResGroup4], (instregex "MOVSDrr")>; def: InstRW<[HWWriteResGroup4], (instregex "MOVSHDUPrr")>; def: InstRW<[HWWriteResGroup4], (instregex "MOVSLDUPrr")>; -def: InstRW<[HWWriteResGroup4], (instregex "MOVSSrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "MOVUPDrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "MOVUPSrr(_REV)?")>; +def: InstRW<[HWWriteResGroup4], (instregex "MOVSSrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "MOVUPDrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "MOVUPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "ORPDrr")>; def: InstRW<[HWWriteResGroup4], (instregex "ORPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "PACKSSDWrr")>; @@ -1037,25 +1037,25 @@ def: InstRW<[HWWriteResGroup4], (instregex "VANDPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VBROADCASTSSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VINSERTPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOV64toPQIrr")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDYrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSYrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSrr(_REV)?")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDYrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPDrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSYrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVAPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVDDUPYrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVDDUPrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVDI2PDIrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVHLPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVLHPSrr")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVSDrr(_REV)?")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVSDrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVSHDUPYrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVSHDUPrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVSLDUPYrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VMOVSLDUPrr")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVSSrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDYrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSYrr(_REV)?")>; -def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSrr(_REV)?")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVSSrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDYrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPDrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSYrr")>; +def: InstRW<[HWWriteResGroup4], (instregex "VMOVUPSrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VORPDYrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VORPDrr")>; def: InstRW<[HWWriteResGroup4], (instregex "VORPSYrr")>; @@ -1376,13 +1376,13 @@ def HWWriteResGroup9 : SchedWriteRes<[HWPort015]> { def: InstRW<[HWWriteResGroup9], (instregex "BLENDPDrri")>; def: InstRW<[HWWriteResGroup9], (instregex "BLENDPSrri")>; def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVD64from64rr")>; -def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVQ64rr(_REV)?")>; +def: InstRW<[HWWriteResGroup9], (instregex "MMX_MOVQ64rr")>; def: InstRW<[HWWriteResGroup9], (instregex "MMX_PANDNirr")>; def: InstRW<[HWWriteResGroup9], (instregex "MMX_PANDirr")>; def: InstRW<[HWWriteResGroup9], (instregex "MMX_PORirr")>; def: InstRW<[HWWriteResGroup9], (instregex "MMX_PXORirr")>; -def: InstRW<[HWWriteResGroup9], (instregex "MOVDQArr(_REV)?")>; -def: InstRW<[HWWriteResGroup9], (instregex "MOVDQUrr(_REV)?")>; +def: InstRW<[HWWriteResGroup9], (instregex "MOVDQArr")>; +def: InstRW<[HWWriteResGroup9], (instregex "MOVDQUrr")>; def: InstRW<[HWWriteResGroup9], (instregex "MOVPQI2QIrr")>; def: InstRW<[HWWriteResGroup9], (instregex "PANDNrr")>; def: InstRW<[HWWriteResGroup9], (instregex "PANDrr")>; @@ -1392,10 +1392,10 @@ def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPDYrri")>; def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPDrri")>; def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPSYrri")>; def: InstRW<[HWWriteResGroup9], (instregex "VBLENDPSrri")>; -def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQAYrr(_REV)?")>; -def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQArr(_REV)?")>; -def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUYrr(_REV)?")>; -def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUrr(_REV)?")>; +def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQAYrr")>; +def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQArr")>; +def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUYrr")>; +def: InstRW<[HWWriteResGroup9], (instregex "VMOVDQUrr")>; def: InstRW<[HWWriteResGroup9], (instregex "VMOVPQI2QIrr")>; def: InstRW<[HWWriteResGroup9], (instregex "VMOVZPQILo2PQIrr")>; def: InstRW<[HWWriteResGroup9], (instregex "VPANDNYrr")>; @@ -1415,32 +1415,32 @@ def HWWriteResGroup10 : SchedWriteRes<[HWPort0156]> { let ResourceCycles = [1]; } def: InstRW<[HWWriteResGroup10], (instregex "ADD(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "ADD(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "ADD(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "ADD8i8")>; def: InstRW<[HWWriteResGroup10], (instregex "ADD8ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "ADD8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "ADD8rr")>; def: InstRW<[HWWriteResGroup10], (instregex "AND(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "AND(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "AND(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "AND8i8")>; def: InstRW<[HWWriteResGroup10], (instregex "AND8ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "AND8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "AND8rr")>; def: InstRW<[HWWriteResGroup10], (instregex "CBW")>; def: InstRW<[HWWriteResGroup10], (instregex "CLC")>; def: InstRW<[HWWriteResGroup10], (instregex "CMC")>; def: InstRW<[HWWriteResGroup10], (instregex "CMP(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "CMP(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "CMP(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "CMP8i8")>; def: InstRW<[HWWriteResGroup10], (instregex "CMP8ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "CMP8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "CMP8rr")>; def: InstRW<[HWWriteResGroup10], (instregex "CWDE")>; def: InstRW<[HWWriteResGroup10], (instregex "DEC(16|32|64)r")>; def: InstRW<[HWWriteResGroup10], (instregex "DEC8r")>; def: InstRW<[HWWriteResGroup10], (instregex "INC(16|32|64)r")>; def: InstRW<[HWWriteResGroup10], (instregex "INC8r")>; def: InstRW<[HWWriteResGroup10], (instregex "LAHF")>; -def: InstRW<[HWWriteResGroup10], (instregex "MOV(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "MOV(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "MOV8ri(_alt)?")>; -def: InstRW<[HWWriteResGroup10], (instregex "MOV8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "MOV8rr")>; def: InstRW<[HWWriteResGroup10], (instregex "MOVSX(16|32|64)rr16")>; def: InstRW<[HWWriteResGroup10], (instregex "MOVSX(16|32|64)rr32")>; def: InstRW<[HWWriteResGroup10], (instregex "MOVSX(16|32|64)rr8")>; @@ -1452,10 +1452,10 @@ def: InstRW<[HWWriteResGroup10], (instregex "NOOP")>; def: InstRW<[HWWriteResGroup10], (instregex "NOT(16|32|64)r")>; def: InstRW<[HWWriteResGroup10], (instregex "NOT8r")>; def: InstRW<[HWWriteResGroup10], (instregex "OR(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "OR(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "OR(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "OR8i8")>; def: InstRW<[HWWriteResGroup10], (instregex "OR8ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "OR8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "OR8rr")>; def: InstRW<[HWWriteResGroup10], (instregex "SAHF")>; def: InstRW<[HWWriteResGroup10], (instregex "SGDT64m")>; def: InstRW<[HWWriteResGroup10], (instregex "SIDT64m")>; @@ -1464,10 +1464,10 @@ def: InstRW<[HWWriteResGroup10], (instregex "SMSW16m")>; def: InstRW<[HWWriteResGroup10], (instregex "STC")>; def: InstRW<[HWWriteResGroup10], (instregex "STRm")>; def: InstRW<[HWWriteResGroup10], (instregex "SUB(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "SUB(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "SUB(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "SUB8i8")>; def: InstRW<[HWWriteResGroup10], (instregex "SUB8ri")>; -def: InstRW<[HWWriteResGroup10], (instregex "SUB8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup10], (instregex "SUB8rr")>; def: InstRW<[HWWriteResGroup10], (instregex "SYSCALL")>; def: InstRW<[HWWriteResGroup10], (instregex "TEST(16|32|64)rr")>; def: InstRW<[HWWriteResGroup10], (instregex "TEST8i8")>; @@ -2286,18 +2286,18 @@ def HWWriteResGroup35 : SchedWriteRes<[HWPort06,HWPort0156]> { let ResourceCycles = [1,1]; } def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup35], (instregex "ADC(16|32|64)rr")>; def: InstRW<[HWWriteResGroup35], (instregex "ADC8i8")>; def: InstRW<[HWWriteResGroup35], (instregex "ADC8ri")>; -def: InstRW<[HWWriteResGroup35], (instregex "ADC8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup35], (instregex "ADC8rr")>; def: InstRW<[HWWriteResGroup35], (instregex "CMOV(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)(16|32|64)rr")>; def: InstRW<[HWWriteResGroup35], (instregex "CWD")>; def: InstRW<[HWWriteResGroup35], (instregex "JRCXZ")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)ri")>; -def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)rr(_REV)?")>; +def: InstRW<[HWWriteResGroup35], (instregex "SBB(16|32|64)rr")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB8i8")>; def: InstRW<[HWWriteResGroup35], (instregex "SBB8ri")>; -def: InstRW<[HWWriteResGroup35], (instregex "SBB8rr(_REV)?")>; +def: InstRW<[HWWriteResGroup35], (instregex "SBB8rr")>; def: InstRW<[HWWriteResGroup35], (instregex "SET(A|BE)r")>; def HWWriteResGroup36 : SchedWriteRes<[HWPort5,HWPort23]> { |
