diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86RegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterBankInfo.cpp | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp index 9c725f154bd..47dff3113fc 100644 --- a/llvm/lib/Target/X86/X86RegisterBankInfo.cpp +++ b/llvm/lib/Target/X86/X86RegisterBankInfo.cpp @@ -198,15 +198,19 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { // Instruction having only floating-point operands (all scalars in VECRReg) getInstrPartialMappingIdxs(MI, MRI, /* isFP */ true, OpRegBankIdx); break; - case TargetOpcode::G_SITOFP: { + case TargetOpcode::G_SITOFP: + case TargetOpcode::G_FPTOSI: { // Some of the floating-point instructions have mixed GPR and FP operands: // fine-tune the computed mapping. auto &Op0 = MI.getOperand(0); auto &Op1 = MI.getOperand(1); const LLT Ty0 = MRI.getType(Op0.getReg()); const LLT Ty1 = MRI.getType(Op1.getReg()); - OpRegBankIdx[0] = getPartialMappingIdx(Ty0, /* isFP */ true); - OpRegBankIdx[1] = getPartialMappingIdx(Ty1, /* isFP */ false); + + bool FirstArgIsFP = Opc == TargetOpcode::G_SITOFP; + bool SecondArgIsFP = Opc == TargetOpcode::G_FPTOSI; + OpRegBankIdx[0] = getPartialMappingIdx(Ty0, /* isFP */ FirstArgIsFP); + OpRegBankIdx[1] = getPartialMappingIdx(Ty1, /* isFP */ SecondArgIsFP); break; } case TargetOpcode::G_FCMP: { |
