diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86InstructionSelector.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstructionSelector.cpp | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp index 90ae6bb4df5..c105b4e63d9 100644 --- a/llvm/lib/Target/X86/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp @@ -947,7 +947,6 @@ bool X86InstructionSelector::selectCmp(MachineInstr &I, bool SwapArgs; std::tie(CC, SwapArgs) = X86::getX86ConditionCode( (CmpInst::Predicate)I.getOperand(1).getPredicate()); - unsigned OpSet = X86::getSETFromCond(CC); unsigned LHS = I.getOperand(2).getReg(); unsigned RHS = I.getOperand(3).getReg(); @@ -981,7 +980,7 @@ bool X86InstructionSelector::selectCmp(MachineInstr &I, .addReg(RHS); MachineInstr &SetInst = *BuildMI(*I.getParent(), I, I.getDebugLoc(), - TII.get(OpSet), I.getOperand(0).getReg()); + TII.get(X86::SETCCr), I.getOperand(0).getReg()).addImm(CC); constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); constrainSelectedInstRegOperands(SetInst, TII, TRI, RBI); @@ -1002,8 +1001,8 @@ bool X86InstructionSelector::selectFCmp(MachineInstr &I, // FCMP_OEQ and FCMP_UNE cannot be checked with a single instruction. static const uint16_t SETFOpcTable[2][3] = { - {X86::SETEr, X86::SETNPr, X86::AND8rr}, - {X86::SETNEr, X86::SETPr, X86::OR8rr}}; + {X86::COND_E, X86::COND_NP, X86::AND8rr}, + {X86::COND_NE, X86::COND_P, X86::OR8rr}}; const uint16_t *SETFOpc = nullptr; switch (Predicate) { default: @@ -1043,9 +1042,9 @@ bool X86InstructionSelector::selectFCmp(MachineInstr &I, unsigned FlagReg1 = MRI.createVirtualRegister(&X86::GR8RegClass); unsigned FlagReg2 = MRI.createVirtualRegister(&X86::GR8RegClass); MachineInstr &Set1 = *BuildMI(*I.getParent(), I, I.getDebugLoc(), - TII.get(SETFOpc[0]), FlagReg1); + TII.get(X86::SETCCr), FlagReg1).addImm(SETFOpc[0]); MachineInstr &Set2 = *BuildMI(*I.getParent(), I, I.getDebugLoc(), - TII.get(SETFOpc[1]), FlagReg2); + TII.get(X86::SETCCr), FlagReg2).addImm(SETFOpc[1]); MachineInstr &Set3 = *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SETFOpc[2]), ResultReg) .addReg(FlagReg1) @@ -1063,7 +1062,6 @@ bool X86InstructionSelector::selectFCmp(MachineInstr &I, bool SwapArgs; std::tie(CC, SwapArgs) = X86::getX86ConditionCode(Predicate); assert(CC <= X86::LAST_VALID_COND && "Unexpected condition code."); - unsigned Opc = X86::getSETFromCond(CC); if (SwapArgs) std::swap(LhsReg, RhsReg); @@ -1075,7 +1073,7 @@ bool X86InstructionSelector::selectFCmp(MachineInstr &I, .addReg(RhsReg); MachineInstr &Set = - *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opc), ResultReg); + *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(X86::SETCCr), ResultReg).addImm(CC); constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); constrainSelectedInstRegOperands(Set, TII, TRI, RBI); I.eraseFromParent(); |
