diff options
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrSSE.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 32 | 
1 files changed, 13 insertions, 19 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index de8df65123c..b3a51003250 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -3704,25 +3704,19 @@ def : Pat<(X86MFence), (MFENCE)>;  // SSE 1 & 2 - Load/Store XCSR register  //===----------------------------------------------------------------------===// -let Defs = [MXCSR] in -  def VLDMXCSR : VPSI<0xAE, MRM2m, (outs), (ins i32mem:$src), -                 "ldmxcsr\t$src", [(int_x86_sse_ldmxcsr addr:$src)], -                 IIC_SSE_LDMXCSR>, VEX, Sched<[WriteLoad]>, VEX_WIG; -let Uses = [MXCSR] in -  def VSTMXCSR : VPSI<0xAE, MRM3m, (outs), (ins i32mem:$dst), -                 "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)], -                 IIC_SSE_STMXCSR>, VEX, Sched<[WriteStore]>, VEX_WIG; - -let Predicates = [UseSSE1] in { -  let Defs = [MXCSR] in -    def LDMXCSR : I<0xAE, MRM2m, (outs), (ins i32mem:$src), -                  "ldmxcsr\t$src", [(int_x86_sse_ldmxcsr addr:$src)], -                  IIC_SSE_LDMXCSR>, TB, Sched<[WriteLoad]>; -  let Uses = [MXCSR] in -    def STMXCSR : I<0xAE, MRM3m, (outs), (ins i32mem:$dst), -                  "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)], -                  IIC_SSE_STMXCSR>, TB, Sched<[WriteStore]>; -} +def VLDMXCSR : VPSI<0xAE, MRM2m, (outs), (ins i32mem:$src), +               "ldmxcsr\t$src", [(int_x86_sse_ldmxcsr addr:$src)], +               IIC_SSE_LDMXCSR>, VEX, Sched<[WriteLoad]>, VEX_WIG; +def VSTMXCSR : VPSI<0xAE, MRM3m, (outs), (ins i32mem:$dst), +               "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)], +               IIC_SSE_STMXCSR>, VEX, Sched<[WriteStore]>, VEX_WIG; + +def LDMXCSR : I<0xAE, MRM2m, (outs), (ins i32mem:$src), +              "ldmxcsr\t$src", [(int_x86_sse_ldmxcsr addr:$src)], +              IIC_SSE_LDMXCSR>, TB, Sched<[WriteLoad]>; +def STMXCSR : I<0xAE, MRM3m, (outs), (ins i32mem:$dst), +              "stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)], +              IIC_SSE_STMXCSR>, TB, Sched<[WriteStore]>;  //===---------------------------------------------------------------------===//  // SSE2 - Move Aligned/Unaligned Packed Integer Instructions  | 

